riscv/rocket-chip
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Author SHA1 Message Date
Howard Mao f3775df04d fix the condition under which comparator error signal is set 2016-07-12 18:37:13 -07:00
Howard Mao 88dc0b983a make sure Comparator logs correctly when prefetching off 2016-07-12 14:36:46 -07:00
Howard Mao 676a536706 fix bugs from adding ComparatorSource backpressure 2016-07-12 13:50:34 -07:00
Howard Mao d435bb4185 reduce hardware usage of Comparator to allow it to synthesize 2016-07-12 10:54:18 -07:00
Howard Mao 18967642de export more detailed status data from GroundTest 2016-07-11 16:41:55 -07:00
Howard Mao e194677087 fix comparator PutBlock data generation and debug output 2016-07-11 12:15:37 -07:00
Howard Mao 5a3d6a1583 NastiTest should cycle through write ids 2016-07-08 17:55:02 -07:00
Howard Mao d80c2f480f make NastiConverterTest act as generator and share blocks 2016-07-08 13:39:46 -07:00
Howard Mao 850fa092a4 refactor how groundtests are configured 2016-07-08 11:40:01 -07:00
Howard Mao f62c74b82a allow groundtest to use non-blocking DCache 2016-07-07 18:59:09 -07:00
Howard Mao 67871654dd start NastiConverterTest higher up in memory 2016-07-07 14:35:04 -07:00
Howard Mao 9f7845f043 don't test BRAMSlave for now 2016-07-06 16:56:14 -07:00
Howard Mao ee624b1c6e make NastiSmallTest a bit more intensive 2016-07-05 17:31:51 -07:00
Howard Mao 8c5fd86f9b fix tracegen module and scripts 2016-07-05 13:50:17 -07:00
Howard Mao 61a44dcfc3 add regression test for L1 voluntary releases 2016-07-04 17:02:24 -07:00
Howard Mao 7f0a583515 timeout for Nasti tests 2016-07-01 18:11:44 -07:00
Howard Mao 37599fb0c9 fix use of width adapter in NastiConverterTest 2016-07-01 17:05:41 -07:00
Howard Mao f46efb671d add multi-transaction timer and add to Comparator 2016-06-30 17:39:10 -07:00
Howard Mao e83b3d2472 turn up generator memory timeout 2016-06-29 10:57:31 -07:00
Howard Mao 80670c08d7 changes to imports after uncore refactor 2016-06-28 13:15:56 -07:00
Howard Mao f438e7048c no longer need DummyCache since tiles no longer require cached interface 2016-06-27 16:32:06 -07:00
Howard Mao 7fea376f8c make comparator fit into GroundTest interface 2016-06-27 16:00:24 -07:00
Howard Mao 3d63329b42 get rid of incorrect, broken, or useless configs in README 2016-06-24 15:37:56 -07:00
Howard Mao 238ce99f5c fix requirement in Comparator 2016-06-23 15:47:09 -07:00
Howard Mao 0967f3cfed use MuxCase and MuxLookup instead of MuxBundle 2016-06-21 14:01:23 -07:00
Howard Mao 181b11bf20 allow Comparator to disable prefetches (for testing BroadcastHub) 2016-06-16 15:14:02 -07:00
Howard Mao a43a93b55c add BRAMSlave unittest 2016-06-16 15:13:40 -07:00
Howard Mao 377de06b72 fix comparator Chisel2 compilation issue 2016-06-14 18:36:38 -07:00
Howard Mao b7c0d0cb4d test both cached and uncached cases in MixedAllocPutRegression 2016-06-14 17:32:29 -07:00
Howard Mao 1074c9fe6d change the way regression IOs are assigned 2016-06-14 11:06:45 -07:00
Howard Mao e284257052 fully disable the cache when not using it in regression tests 2016-06-14 11:06:45 -07:00
Howard Mao 3e105eb352 make sure MixedAllocPutRegression uses a block that hasn't been cached already 2016-06-13 18:17:48 -07:00
Howard Mao fe8d81958f fix groundtests to fit new way of parameterizing TileLink clients 2016-06-13 16:17:27 -07:00
Howard Mao a921458758 add a regression test for no-alloc Put following an alloc Put 2016-06-13 16:17:27 -07:00
Howard Mao 21feeb4a4f have multiple outstanding requests in CacheFillTest 2016-06-08 19:53:42 -07:00
Howard Mao f44778fa56 make sure Cached generator comparison truncates to correct size 2016-06-06 17:45:04 -07:00
Howard Mao 022503748e make Memtest generators more configurable 2016-06-06 09:44:09 -07:00
Howard Mao 2163ebfca3 use a generic Nasti memory driver for unit tests 2016-06-06 09:43:39 -07:00
Howard Mao a917f554fd use Wesley's test SRAM for AXI -> AHB converter test 2016-06-01 11:40:59 -07:00
Howard Mao 8f269b2eec stall for more cycles in Hasti test 2016-05-31 19:46:42 -07:00
Howard Mao 87be2bcd60 make sure TraceGen addresses are correct 2016-05-20 16:12:11 -07:00
Howard Mao 3e759d2575 add Hasti test to unit test 2016-05-06 11:31:43 -07:00
Howard Mao 1882e694e4 only write to a single tohost location 2016-05-03 20:20:52 -07:00
Howard Mao 6cb0979ac4 fix CacheFillTest 2016-05-03 13:35:38 -07:00
Howard Mao 518d510622 only write out finish from tile 0 in groundtest 2016-05-03 13:09:22 -07:00
Howard Mao b95f095aca write to multiple possible tohost locations 2016-05-02 20:11:20 -07:00
Howard Mao 4b4e8f7f62 fixes for priv-1.9 changes 2016-05-02 18:25:02 -07:00
Howard Mao 5e793427eb use address map instead of MMIOBase 2016-04-21 15:38:43 -07:00
Howard Mao 82cacfbc5e add NastiMemoryDemux to unit tests 2016-04-19 09:34:42 -07:00
Howard Mao 075fdfb847 use Atos serdes/desser in Atos unit test 2016-04-19 09:34:12 -07:00
Howard Mao ee66da603a move AtosConverterTest into UnitTestSuite 2016-04-19 09:34:12 -07:00
Howard Mao d19aaf8d89 test AtoS conversions and SERDES 2016-04-19 09:33:05 -07:00
Howard Mao d5153bf42e don't connect unnecessary wires in regression test 2016-04-12 15:38:55 -07:00
Howard Mao 55df7d97cc add regression test for put immediately before put block 2016-04-12 15:38:55 -07:00
Howard Mao 485d8d7f9c fix nasti converter tests 2016-04-12 15:38:55 -07:00
Howard Mao b2e15cd9bc NASTI to SMI converter test should also test TL to NASTI conversion 2016-04-12 15:38:55 -07:00
Howard Mao 0c562277db test Nasti to SMI converter with SMI datawidth being different 2016-04-12 15:38:55 -07:00
Howard Mao af3bc1cb79 don't use ROM for partial writemask regression 2016-03-25 14:06:06 -07:00
Howard Mao 5372f181b1 add in missing connections for regression test 2016-03-25 14:05:52 -07:00
Howard Mao 471f4c2695 change WriteMaskedPutBlockRegression for better bug detection 
Instead of sending puts back-to-back, separate the two puts with a get.
Also, stall a bit between each transaction. This makes sure the puts and
intermediate get are sent to the same transactor, which will cause the
data buffer to get overwritten between the two puts.
 2016-03-23 16:31:19 -07:00
Howard Mao 3b0e87f42a pass CSRs through to ground test and get DMA tests working again 2016-03-22 20:18:02 -07:00
Howard Mao 7b7e954133 make sure DummyPTW does not invalidate the TLB 2016-03-22 19:59:58 -07:00
Howard Mao c2e9971b5f move toaxe.py script into top-level Rocket-Chip repo 2016-02-23 08:52:32 -08:00
Howard Mao 91e3c9b96f reuse generator parameters for tracegen 2016-02-22 09:53:31 -08:00
Howard Mao da302504a5 get rid of sequential same id get regression in broadcast regression suite 2016-02-19 23:14:34 -08:00
Howard Mao 000af5e662 add NastiIOHostIO converter test 2016-02-19 11:21:53 -08:00
Howard Mao f290157cb3 check that MultiWidthFifo count is correct 2016-02-17 13:36:07 -08:00
Howard Mao 4915a258f6 add unit test for some modules 2016-02-16 23:10:55 -08:00
Howard Mao e90dfcb403 add test for NASTI to TL converter 2016-02-10 11:07:37 -08:00
Howard Mao 428fa14601 fix DummyPTW response 2016-01-27 15:33:02 -08:00
Howard Mao a59ff38b67 use MMIO for DMA requests instead of separate channel 2016-01-27 15:33:02 -08:00
Howard Mao 04e1f8c5c3 lowercase SMI to Smi 2016-01-11 16:18:49 -08:00
Howard Mao 80d97d5f9e test DMA streaming 2016-01-06 21:38:12 -08:00
Howard Mao b8d0376d3f Merge pull request #1 from ucb-bar/dma 
add DMA test
 2015-12-22 10:33:48 -05:00
Howard Mao 24eecee148 add DMA test 2015-12-16 21:26:22 -08:00
Howard Mao 4858ca9a60 add a regression to test proper writeback 2015-12-16 21:05:56 -08:00
Howard Mao 176d3c890c add some more regression tests 2015-12-15 23:00:17 -08:00
Howard Mao 484e8ce20b add regression tests for catching specific memory bugs 2015-12-06 02:57:45 -08:00
Howard Mao 158d1d870c do all the writes before doing the gets in GeneratorTest 2015-11-21 09:42:00 -08:00
Howard Mao 49c6b1ad1c add CacheFillTest 2015-11-19 00:15:36 -08:00
Howard Mao 640544ea5a generalize test harness 2015-11-18 22:54:05 -08:00
Howard Mao f325874420 make sure timeout doesn't trigger spuriously on reset 2015-11-18 22:53:50 -08:00
Howard Mao 8bc90ab9bd separate out common functionality 2015-11-18 20:53:19 -08:00
Howard Mao 10f4c6c71c interleave cached and uncached requests 2015-11-12 11:34:44 -08:00
Howard Mao 7cae6cedf5 finished bit should be set true if generator not being used 2015-11-11 18:51:16 -08:00
Howard Mao f93872d6b4 make sure cached generator actually drives finished signal 2015-11-11 18:45:36 -08:00
Howard Mao eeda3dd770 add README 2015-11-11 18:30:19 -08:00
Howard Mao 9482d944ca make Uncached generator vary the alloc bit 2015-11-11 18:26:56 -08:00
Howard Mao 8a6b231b08 explicitly configure the number of requests being sent by generators 2015-11-11 14:32:19 -08:00
Howard Mao 13f62e0364 make sure generators can detect lockup 2015-11-10 14:39:56 -08:00
Howard Mao 520925c207 fix up build.sbt and add gitignore 2015-11-10 13:38:39 -08:00
Howard Mao d844bee310 properly shift grant data when checking correctness 2015-10-31 18:58:05 -07:00
Howard Mao 644b66a3a8 selectively enable or disable uncached and cached generators 2015-10-31 17:43:25 -07:00
Howard Mao bcc631f756 generate word-size requests in uncached generator 2015-10-31 17:43:08 -07:00
Howard Mao c1f42ce3d4 add an L1 cache request generator 2015-10-30 12:49:57 -07:00
Howard Mao 3103fa8da2 rename tl to mem in generator 2015-10-27 17:14:56 -07:00
Howard Mao aeb9c86459 use the uncached port instead of the cached port 2015-10-26 23:09:36 -07:00
Howard Mao b22088d934 make sure data checked is same as data sent 2015-10-26 21:55:04 -07:00
Howard Mao 2b252bc6ff first commit 2015-10-26 21:43:50 -07:00