make sure cached generator actually drives finished signal
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@ -189,6 +189,8 @@ class HellaCacheGenerator(id: Int)
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when (req_wrap) { sending := Bool(false); state := s_finished }
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io.finished := (state === s_finished)
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assert(!io.mem.resp.valid || !io.mem.resp.bits.has_data ||
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io.mem.resp.bits.data === req_data,
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s"Received incorrect data in cached generator ${id}")
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