NastiTest should cycle through write ids

2016-07-08 17:55:02 -07:00
parent d80c2f480f
commit 5a3d6a1583
1 changed files with 1 additions and 1 deletions
--- a/groundtest/src/main/scala/nastitest.scala
+++ b/groundtest/src/main/scala/nastitest.scala
@@ -44,7 +44,7 @@ class NastiGenerator(id: Int)(implicit val p: Parameters) extends Module

  io.mem.aw.valid := (state === s_write_addr)
  io.mem.aw.bits := NastiWriteAddressChannel(
-    id = UInt(0),
+    id = write_idx(nastiXIdBits - 1, 0),
    addr = write_addr,
    len = UInt(0),
    size = UInt(log2Ceil(genWordBytes)))