Andrew Waterman
6a9390c50e
Avoid spurious D$ assertion failures
...
For the Rocket pipeline, this fix is needless and the problem is that the
assertion is too conservative, but I solved it this way to avoid problems
for other plausible use cases where physical and virtual accesses are
intermixed.
2015-05-19 03:00:53 -07:00
Henry Cook
a315fe93c1
simplify ClientMetadata.makeRelease
2015-04-20 10:46:24 -07:00
Henry Cook
3048f4785a
HeaderlessTileLinkIO -> ClientTileLinkIO
2015-04-17 16:56:53 -07:00
Henry Cook
91e882e3f8
Use HeaderlessTileLinkIO
2015-04-13 15:58:10 -07:00
Christopher Celio
4d6ebded02
Added assert to nbdcache
2015-04-11 02:58:34 -07:00
Christopher Celio
a564f08702
Rename dmem.sret signal to more accurate invalidate_lr
2015-04-11 02:26:33 -07:00
Yunsup Lee
53617d6df5
fix long-standing dcache bug
...
have to initialize register, if it is used the same cycle it is begin written
2015-03-17 21:45:17 -07:00
Andrew Waterman
e85c54cc4b
New privileged ISA implementation
2015-03-14 02:49:07 -07:00
Henry Cook
95aa295c39
Use HeaderlessTileLinkIO to cut down on unconnected port errors in VCS
2015-03-09 16:34:43 -07:00
Christopher Celio
06dea3790a
Removed sret from ptw; sret now comes thru io.cpu to dcache
2015-03-03 16:50:41 -08:00
Christopher Celio
5d07733057
Removed TLBPTWIO from the io.cpu bundle for icache/dcache
2015-03-03 16:40:39 -08:00
Henry Cook
1e0c16c557
new metadata api
2015-02-28 17:00:32 -08:00
Henry Cook
0b131173e6
WritebackUnit multibeat control logic bugfix
2015-02-16 10:59:57 -08:00
Henry Cook
741e6b77ad
Rename some params, use refactored TileLink
2015-02-01 20:37:31 -08:00
Henry Cook
1cb65d5ec1
%s/master/manager/g
2014-12-29 22:56:18 -08:00
Henry Cook
77e5e6b561
refill bug
2014-12-17 19:29:28 -08:00
Henry Cook
08dcf4c6ca
refactor cache params
2014-12-17 14:28:05 -08:00
Henry Cook
d29793d1f7
cleanup CoherenceMetadata and coherence params
2014-12-15 19:23:38 -08:00
Henry Cook
72ea24283b
multibeat TL; passes all tests
2014-12-12 16:54:33 -08:00
Henry Cook
b7b2923bff
Cleanup MSHR internal bundles
2014-11-11 18:18:35 -08:00
Henry Cook
c9e7874818
Major tilelink revision for uncached message types
2014-11-11 17:36:48 -08:00
Henry Cook
bf901e4bca
Remove master_xact_id from Release
2014-11-06 12:09:45 -08:00
Henry Cook
8eb64205f5
bug fix for nbdcache s2_data
2014-09-25 12:00:20 -07:00
Yunsup Lee
8abf62fae3
add LICENSE
2014-09-12 18:06:41 -07:00
Henry Cook
b42a2ab40a
Final parameter refactor
2014-09-01 13:28:58 -07:00
Henry Cook
6a4193cf90
minor cache param cleanup
2014-08-19 11:38:46 -07:00
Henry Cook
2de268b3b1
Cache utility traits. Completely compiles, asm tests hang.
2014-08-19 11:38:20 -07:00
Henry Cook
0dac9a7467
Full conversion to params. Compiles but does not elaborate.
2014-08-19 11:38:02 -07:00
Henry Cook
dab675b231
refactor Metadata, clean and expand coherence API
2014-05-28 16:05:48 -07:00
Andrew Waterman
4ca152b012
Use BundleWithConf to avoid clone method boilerplate
2014-05-09 19:37:16 -07:00
Henry Cook
5bc6981414
fix metadata default, add bug TODO
2014-05-06 18:36:22 -07:00
Henry Cook
7d6a642c0c
correct use of function value to initialize MetaDataArray
2014-05-06 13:00:00 -07:00
Henry Cook
7f690dd9c8
parameterize metadataarray
2014-05-01 01:45:45 -07:00
Henry Cook
519b2ea2b6
New metadata result trait
2014-04-26 19:08:56 -07:00
Henry Cook
1b156c6db9
TileLinkIO.GrantAck -> TileLinkIO.Finish
2014-04-26 15:18:21 -07:00
Henry Cook
fc825c7103
MetaData & friends moved to uncore/
2014-04-23 16:23:51 -07:00
Henry Cook
f4d326b8d7
Prep in HellaCache for extracting MetaData to uncore
2014-04-23 15:43:31 -07:00
Henry Cook
5c62cff2ce
put replacement policy in uncore and minor nbdcache cleanups
2014-04-22 16:53:20 -07:00
Henry Cook
1fa505f9ff
remove superfluous AVec object
2014-04-16 17:19:32 -07:00
Henry Cook
1da8ef2ddf
Added serdes to decouple cache row size from tilelink data size
2014-04-10 12:34:12 -07:00
Henry Cook
910b3b203a
removed AddressSpaceConstants, CacheConstants, and TileLinkSizeConstants
2014-04-10 12:32:44 -07:00
Henry Cook
ebdc0a2692
merge Aqcuire and AcquireData. cache line size coupled to tilelink data size
2014-04-10 12:09:52 -07:00
Henry Cook
2c2b3a7678
cleanups supporting uncore hierarchy
2014-01-31 12:07:26 -08:00
Andrew Waterman
57f4d89c90
Generate D$ replay_next signals correctly
2014-01-16 00:16:09 -08:00
Andrew Waterman
6ebdc4d94e
Simplify store conditional failure code generation
2014-01-16 00:15:48 -08:00
Andrew Waterman
31060ea8ae
Fix fubar long-latency writeback control logic
...
Load miss writebacks happening at the same time as multiplication
wasn't working. Hopefully this does it.
2014-01-14 04:02:43 -08:00
Andrew Waterman
e8486817e6
Clean up formatting (i.e. remove tabs, semicolons)
2014-01-13 21:43:56 -08:00
Andrew Waterman
07a91bb99a
Miscellaneous cleanup
2013-12-09 19:53:14 -08:00
Andrew Waterman
924261e2b2
Update to new privileged ISA... phew
2013-11-25 04:35:15 -08:00
Yunsup Lee
1583560757
fix replay bug, don't respond when cmd is a NOP
2013-10-28 22:35:18 -07:00
Andrew Waterman
f12bbc1e43
working RoCC AccumulatorExample
2013-09-14 22:34:53 -07:00
Andrew Waterman
18968dfbc7
Move store data generation into cache
2013-09-14 16:15:07 -07:00
Andrew Waterman
d053bdc89f
Remove Hwacha from Rocket
...
Soon it will use the coprocessor interface.
2013-09-12 22:34:38 -07:00
Andrew Waterman
59f5358435
Implement AQ/RL; move fence logic out of cache
2013-09-12 16:07:30 -07:00
Henry Cook
f9b85d8158
NetworkIOs no longer use thunks
2013-09-10 16:15:19 -07:00
Henry Cook
d06e24ac24
new enum syntax
2013-09-10 10:51:35 -07:00
Henry Cook
3a266cbbfa
final Reg changes
2013-08-15 15:28:15 -07:00
Henry Cook
b570435847
Reg standardization
2013-08-13 17:50:02 -07:00
Henry Cook
1a9e43aa11
initial attempt at upgrade
2013-08-12 10:39:11 -07:00
Henry Cook
4eaab214d2
Fold uncore constants into TileLinkConfiguration, update coherence API
2013-08-02 16:29:51 -07:00
Henry Cook
bef6c1db35
minor nbdcache cleanup
2013-08-02 16:29:37 -07:00
Henry Cook
9abdf4e154
Make compatible with scala 2.10. List.sort deprecated. Refactor constants into package object.
2013-07-23 20:27:58 -07:00
Henry Cook
569d8fd796
Merge branch 'tilelink-data'
2013-05-23 14:14:40 -07:00
Henry Cook
69b508ff39
ported caches and htif to use new tilelink
2013-05-21 17:21:04 -07:00
Andrew Waterman
1dab984231
use UFix instead of Bits for arithmetic
2013-05-18 00:45:29 -07:00
Andrew Waterman
474d321cc7
fix meta hazard counter to reset on new meta writes
2013-05-01 16:35:24 -07:00
Andrew Waterman
a6a88fce19
Revert "broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle"
...
This reverts commit b41e6bc50519631ba097ac1196737be7107295f9.
2013-05-01 16:34:45 -07:00
Andrew Waterman
63a38e7982
Revert "temp"
...
This reverts commit 73705e6ed8f98d08ce6b30fbe760de694c6563ae.
2013-05-01 16:34:33 -07:00
Henry Cook
b6945408cb
temp
2013-05-01 10:24:36 -07:00
Henry Cook
722bc917d3
broaden scope of s1_nack to include new probes accepted by the probe unit on that cycle
2013-05-01 10:05:54 -07:00
Andrew Waterman
1501e90c1f
interlock probe unit on tag RAW hazards
2013-04-30 00:38:22 -07:00
Henry Cook
e8b20f3d38
clear meta state of silently-dropped, clean evictee, so as to prevent a write race on meta array between probes on evictee and refill grant
2013-04-25 17:41:04 -07:00
Andrew Waterman
ae7720e284
guarantee LR/SC forward progress
...
the mechanism is to block new probes for several cycles after a successful LR.
this also cleans up the MSHR <-> ProbeUnit interface slightly.
2013-04-07 19:27:21 -07:00
Andrew Waterman
e74e032c87
simplify MSHR memory response logic
2013-04-06 01:03:37 -07:00
Andrew Waterman
1abb9277db
fix LR/SC atomicity violation
...
note, it's still not starvation-free.
2013-04-05 19:13:38 -07:00
Andrew Waterman
8cbdeb2abf
add LR/SC support
2013-04-04 17:07:09 -07:00
Henry Cook
f8aebcbf8c
fix for cache controller bug: failing to mux correct metadata into mshr.io.old_meta on tag match
2013-04-04 15:50:29 -07:00
Henry Cook
95f0a688e9
Merge branch 'release-xacts'
...
Conflicts:
src/htif.scala
src/icache.scala
src/nbdcache.scala
src/tile.scala
2013-03-20 17:37:50 -07:00
Henry Cook
273bd34091
Generalized mem arbiter, moved to uncore. Support for multiple banks when acking grants.
2013-03-20 15:53:36 -07:00
Andrew Waterman
ea9d0b771e
remove aborts; simplify probes
2013-03-19 15:29:40 -07:00
Henry Cook
e0361840bd
writebacks on release network pass asm tests and bmarks
2013-02-28 18:11:40 -08:00
Andrew Waterman
35349d227f
update to new Mem style
2013-02-20 16:09:46 -08:00
Andrew Waterman
1fbc20450e
don't allow simultaneous reads and writes to the tag ram
2013-01-24 17:55:00 -08:00
Andrew Waterman
37ee843b2c
don't use reset combinationally
2013-01-24 17:55:00 -08:00
Andrew Waterman
bb6fbddf1f
don't probe the mshr file to inquire about refills
2013-01-24 17:54:59 -08:00
Rimas Avizienis
63060bc0a8
minor tweaks for eos18 tapeout (SRAM r/w port ordering, etc)
2013-01-23 19:27:53 -08:00
Henry Cook
6b00e7ff74
New TileLink bundle names
2013-01-21 17:18:23 -08:00
Henry Cook
a2fa3fd04d
Refactored packet headers/payloads
2013-01-15 15:50:37 -08:00
Henry Cook
e1225c5114
standardize IO naming convention
2013-01-07 13:41:36 -08:00
Henry Cook
261e14f831
Refactored uncore conf
2013-01-07 13:41:36 -08:00
Andrew Waterman
f5c53ce35d
add ecc support to d$ data rams
...
i haven't injected errors yet; it may well be incorrect.
2012-12-11 15:58:53 -08:00
Andrew Waterman
3f59e439ef
fix d$ tag raw hazard
2012-12-07 15:14:20 -08:00
Andrew Waterman
4dda38204f
fix d$ reset bug
2012-12-06 03:13:22 -08:00
Andrew Waterman
290d3d226c
fix AMO and store bypass bugs
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thanks, torture tester
2012-12-06 02:07:52 -08:00
Andrew Waterman
4608660f6e
torture revealed a couple bugs
...
FP loads/stores with certain negative offsets could cause illegal rounding
mode traps, and x's were cropping up in situations that are benign in HW.
2012-12-04 05:57:53 -08:00
Andrew Waterman
90cae54ac4
fix D$ read/write concurrency bug
2012-11-27 02:42:27 -08:00
Andrew Waterman
608f65e716
don't wastefully read 2x the bits from D$ RAMs
2012-11-26 20:34:30 -08:00
Andrew Waterman
8a6ff5f9aa
fix D$ writeback bug
...
I swear I did this last week... perhaps I am finally losing it!
2012-11-25 19:46:48 -08:00
Andrew Waterman
de2f28193a
get rid of more global constants
2012-11-25 04:24:25 -08:00
Andrew Waterman
c036cdc1ea
add option for 2-cycle load-use delay
2012-11-24 22:01:08 -08:00