riscv/rocket-chip
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Author SHA1 Message Date
Yunsup Lee 6bbbf36979 push accel/rocket dmem port back to rocket 2014-01-16 16:01:41 -08:00
Yunsup Lee d450b85483 Merge branch 'master', remote-tracking branch 'origin' into hwacha 2013-11-21 14:57:38 -08:00
Yunsup Lee 68e270eeb2 fix slli/slliw encoding bug 2013-11-21 14:44:58 -08:00
Yunsup Lee c1966e2b0a forgot to put htif into uncore package 2013-11-07 15:42:03 -08:00
Yunsup Lee da033af0b0 move htif to uncore 2013-11-07 13:18:46 -08:00
Yunsup Lee 4c56323f6f hookup all memory ports 2013-11-05 17:12:09 -08:00
Yunsup Lee 1583560757 fix replay bug, don't respond when cmd is a NOP 2013-10-28 22:35:18 -07:00
Yunsup Lee 44e92edf92 fix scr parameterization bug 2013-08-24 22:42:51 -07:00
Yunsup Lee 2ca5127785 parameterize number of SCRs 2013-08-24 15:47:14 -07:00
Yunsup Lee 11133d6d4c clock gate s2 registers in the frontend 2013-05-21 18:59:21 -07:00
Yunsup Lee c837c1d800 fix bug in previous JALR commit 
on commit tag 9a122c06d1bf11237d7fb0769d454a67bbb7400e
 2013-05-21 18:28:44 -07:00
Yunsup Lee dcde377303 Fix DM I$ deadlock 
BTB predictions were causing infinite miss loops
 2013-05-20 15:22:58 -07:00
Yunsup Lee 0f50970913 move HellaQueue to uncore 2013-03-19 00:43:20 -07:00
Yunsup Lee a0bd0adeb2 change write/read port ordering for vlsi_mem_gen script 2013-01-29 21:32:42 -08:00
Yunsup Lee 60bd3a6413 Revert "shuffled FPU control logic around to make functional unit retiming work better" 
This reverts commit 20dd308067b143adff4913fc7ac710a393ca1d86.
 2013-01-29 19:34:55 -08:00
Yunsup Lee 395e4e3dd6 andrew'x fix for D$ corner case in writeback->abort->probe 2012-11-18 03:11:06 -08:00
Yunsup Lee 06eeb90e2a vector unit interfaces to the new D$ 2012-11-17 20:07:41 -08:00
Yunsup Lee 81d711e892 fix D$ bug; now D$ doesn't respond to prefetches 2012-11-17 20:06:13 -08:00
Yunsup Lee be1980dd2d refactored vector queue interface 2012-11-07 01:15:33 -08:00
Yunsup Lee 8764fe786a refactored vector tlb 2012-11-06 23:53:52 -08:00
Yunsup Lee 9a02298f6f andrew's fix for tlb lockup 2012-11-06 23:52:58 -08:00
Yunsup Lee ee081d1671 modify code to fix UFix := Bits error 2012-11-05 01:35:55 -08:00
Yunsup Lee 2a25307a8f revamp the vector unit with the new frontend 2012-11-05 01:35:55 -08:00
Yunsup Lee 2af84f994a remove reset pin on llc 2012-07-28 21:14:51 -07:00
Yunsup Lee 0a1cd1175c add reset pin to llc 2012-07-27 18:44:39 -07:00
Yunsup Lee 3a2b305ddf change htif width to 16 2012-07-25 17:25:50 -07:00
Yunsup Lee 309193dd07 change llc size 2012-07-24 14:10:29 -07:00
Yunsup Lee 6541cf22a4 fix bug in coherence hub, respect xact_rep.ready 2012-07-23 20:56:55 -07:00
Yunsup Lee f4e3e72ad1 hoist HTIF_WIDTH out to consts 2012-07-23 17:30:04 -07:00
Yunsup Lee 379f021359 change ioHTIF interface between the tile/uncore boundary to cope with asynchrony 2012-07-22 18:26:02 -07:00
Yunsup Lee c892950bf1 hoist out uncore as its own component 2012-07-22 17:48:17 -07:00
Yunsup Lee f633a55722 fix dcache tag array size 2012-07-16 22:19:03 -07:00
Yunsup Lee c9602a0d2e fix vector control decode bug 2012-05-15 10:26:37 -07:00
Yunsup Lee bb704dc0c9 fix vector length calc bug, thanks chris and andrew 2012-03-27 12:04:07 -07:00
Yunsup Lee a70f0414fa fix a workaroundable bug 2012-03-26 20:51:54 -07:00
Yunsup Lee 32d95e9594 fix -1:0 index problem for direct map case 2012-03-26 17:00:01 -07:00
Yunsup Lee e6b0e565de turn HAVE_VEC on 2012-03-26 01:21:39 -07:00
Yunsup Lee 1f33f6bb58 HAVE_VEC is on 2012-03-24 20:54:43 -07:00
Yunsup Lee 65929a62e3 fix reset value for appvl 2012-03-22 15:32:04 -07:00
Yunsup Lee aaed0241af get rid of vxcptwait 2012-03-21 15:09:04 -07:00
Yunsup Lee 023734175d now fence stalls in decode 2012-03-20 17:10:05 -07:00
Yunsup Lee e450e3aa40 fix irt counter bug regarding vector stuff 2012-03-20 17:09:54 -07:00
Yunsup Lee 7d7d7f49f9 change the tlb arbiter to a round robing one 2012-03-20 15:21:36 -07:00
Yunsup Lee 1cddd5de56 fix amo locking up problem 2012-03-20 02:16:28 -07:00
Yunsup Lee 56cb9b7a63 fix bug in coherence hub, specifically in abort handling logic 2012-03-20 02:16:28 -07:00
Yunsup Lee c036fff79c fix id interrupt signal 2012-03-19 15:13:57 -07:00
Yunsup Lee 0edea00166 now HAVE_VEC is true, since it passes the emulator 2012-03-19 03:10:00 -07:00
Yunsup Lee 264732556f fixes to match verilog X semantics 2012-03-19 03:10:00 -07:00
Yunsup Lee ba06cd953e add chosen 2012-03-18 20:43:17 -07:00
Yunsup Lee 2a01f558ba fix unmasked valid bug in ctrl_vec 2012-03-18 19:55:24 -07:00
Yunsup Lee 98e10ddc3c update vector exception instructions 2012-03-18 16:36:12 -07:00
Yunsup Lee 7493d55d3f add pf fault handling 2012-03-18 15:06:39 -07:00
Yunsup Lee 62ada5ea9e hookup vitlb ptw port 2012-03-17 23:01:06 -07:00
Yunsup Lee b793d63182 no vector interrupt masking 2012-03-17 23:01:06 -07:00
Yunsup Lee 8a4f95e617 changes to xcpt handling 2012-03-17 17:50:37 -07:00
Yunsup Lee 8c50c81b81 drop vec_irq_aux pcr register, now everything goes through badvaddr 2012-03-17 14:03:57 -07:00
Yunsup Lee 3b4680a834 add vitlb exception port 2012-03-17 14:03:33 -07:00
Yunsup Lee d38603a4ee change number of tlb entries 2012-03-16 17:08:03 -07:00
Yunsup Lee ba566f246e change icache parameters 2012-03-15 15:35:12 -07:00
Yunsup Lee 72006160dc fix vxcptwait inst bug, it was incorrect when exception_valid was on before do_xcptwait 2012-03-15 02:10:21 -07:00
Yunsup Lee f972977da1 refactored VMU, now uses one skid buffer 2012-03-15 01:10:17 -07:00
Yunsup Lee b19d783fbd add vector irq handler 2012-03-14 14:15:28 -07:00
Yunsup Lee 040d62f372 refactored vector exception handling interface 2012-03-13 23:45:34 -07:00
Yunsup Lee b100544b25 datapath to read out vector state 2012-03-13 23:45:34 -07:00
Yunsup Lee 5655dbd5da add vvcfg and vtcfg instructions 2012-03-13 23:45:34 -07:00
Yunsup Lee 1ba5e7b865 changes to the vector exception interface 2012-03-11 21:38:47 -07:00
Yunsup Lee 113a94a21d add vector hold waits 2012-03-11 16:29:19 -07:00
Yunsup Lee e42a4c767e don't stall on vector fences, keep replaying 2012-03-11 16:29:19 -07:00
Yunsup Lee 1aa4b0e93d going back to null coherence hub 2012-03-10 20:16:20 -08:00
Yunsup Lee 44ff22a26f vector exception handler now handles prefetches correctly 2012-03-10 12:54:36 -08:00
Yunsup Lee a1b30282dd major refactoring on vector exception interface 2012-03-09 01:09:22 -08:00
Yunsup Lee 8acbe98f53 change how fence.*.cv works, now control processor stalls on the fence instruction 2012-03-08 23:32:31 -08:00
Yunsup Lee 81dcb194d3 new vector exception interface 2012-03-06 22:39:15 -08:00
Yunsup Lee dba99e07a9 set MEM_TAG_BITS to 5 when HAVE_VEC is true, since NMSHR=4 2012-03-06 08:54:21 -08:00
Yunsup Lee a950d526d2 add prefetch count queue 2012-03-05 12:09:41 -08:00
Yunsup Lee d4ec7ff4d9 refined vector exception interface 2012-03-03 16:11:54 -08:00
Yunsup Lee e28a551368 refactor code related to vector exceptions 
- revisied interfaces
- new instructions
 2012-03-03 15:15:00 -08:00
Yunsup Lee f9fb3978ca fix store prefetch bug, it no longer occupies an entry in the sdq 2012-03-03 15:14:59 -08:00
Yunsup Lee 54baa0713c hack fence.g.cv to support waiting the control processor 2012-03-02 02:10:26 -08:00
Yunsup Lee 1054cec087 add vec countq interface 2012-03-02 00:43:32 -08:00
Yunsup Lee 8678b3d70c clean up ioDecoupled/ioPipe interface 2012-03-01 20:48:46 -08:00
Yunsup Lee c7b01230f4 fix mul/div when waddr=0, can't believe torture didn't find this one 2012-03-01 10:15:27 -08:00
Yunsup Lee a8ef5e9e27 change NMSHR when HAVE_VEC is true 2012-03-01 01:07:47 -08:00
Yunsup Lee 6847160343 refactor arbiter priorities 2012-03-01 00:22:34 -08:00
Yunsup Lee f641b44fb8 changes after the module uniquify bug fix 2012-02-29 22:00:59 -08:00
Yunsup Lee 4939b72ba5 Merge branch 'master' of github.com:ucb-bar/riscv-rocket 2012-02-29 17:12:02 -08:00
Yunsup Lee 20d0088f66 temporary fix to match bit widths for Mem 2012-02-29 17:09:31 -08:00
Yunsup Lee 3d96a2d4f0 add fpu.dec.wen := false when HAVE_FPU is turned off 2012-02-27 14:00:58 -08:00
Yunsup Lee bfd0ae125e upgrade to new rocket/vu memory interface, fix amo nack bug in hellacache 2012-02-26 23:46:51 -08:00
Yunsup Lee f3bb02b2ea refactored dmem arbiter 2012-02-26 17:38:08 -08:00
Yunsup Lee 766a039ffe small changes to the dtlb arbiter 2012-02-26 16:19:50 -08:00
Yunsup Lee 49efe4b744 now vu steals cycles from the fpu's fma alu 2012-02-26 01:55:07 -08:00
Yunsup Lee 94ba32bbd3 change package name and sbt project name to rocket 2012-02-25 17:09:26 -08:00
Yunsup Lee 946e0c6e4e add vector exception infrastructure 2012-02-25 16:37:56 -08:00
Yunsup Lee 3839e3a318 massive refactoring of vector constants 2012-02-25 15:55:36 -08:00
Yunsup Lee a1600d95db fix bug related to waddr and wdata in wb stage 
for the instructions which don't use waddr/wdata for writeback, the contents were getting overwritten by the ll ops
it manifested itself after cp imul were sharing the alu with the vu
 2012-02-25 12:21:10 -08:00
Yunsup Lee 137fd62007 refactor cpfences 2012-02-25 12:20:36 -08:00
Yunsup Lee 63939efd0c fix ctrl vec iface hookup - final 2012-02-23 23:03:44 -08:00
Yunsup Lee bf1e643913 fix ctrl vec iface hookup 2012-02-23 22:55:25 -08:00
Yunsup Lee 2ea309cf80 bug fixes to ctrl_vec 2012-02-23 22:35:05 -08:00