riscv/rocket-chip
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fix a workaroundable bug

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This commit is contained in:
Yunsup Lee 2012-03-26 20:51:54 -07:00
parent 32d95e9594
commit a70f0414fa
1 changed files with 1 additions and 1 deletions
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2
rocket/src/main/scala/dpath.scala
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@ -412,7 +412,7 @@ class rocketDpath extends Component
rfile.io.w0.addr := wb_reg_waddr
rfile.io.w0.en := io.ctrl.wb_wen || wb_reg_ll_wb
rfile.io.w0.data := Mux(io.ctrl.pcr != PCR_N, pcr.io.r.data, wb_wdata)
rfile.io.w0.data := Mux(io.ctrl.pcr != PCR_N && io.ctrl.wb_wen, pcr.io.r.data, wb_wdata)
io.ctrl.wb_waddr := wb_reg_waddr
io.ctrl.mem_wb := dmem_resp_replay;