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riscv
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rocket-chip
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379f02135912b4b5fe7e48dc128bd8f3853eb6f1
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Yunsup Lee
379f021359
change ioHTIF interface between the tile/uncore boundary to cope with asynchrony
2012-07-22 18:26:02 -07:00
rocket/src/main
/scala
change ioHTIF interface between the tile/uncore boundary to cope with asynchrony
2012-07-22 18:26:02 -07:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%