riscv/rocket-chip
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Author SHA1 Message Date
Henry CookandHoward Mao 16bfbda3c9 Refactor the TransactionTracker logic in all the L2 TileLink Managers. 
They now share common sub-transactions within traits, and use a common
set of state transitions and scoreboarding logic. Tracker allocation
logic has also been updated. No changes to external IOs or the TileLink protocol.
A new bufferless Broadcast hub is also included, but does not yet pass fuzzing checks.
 2016-06-16 15:18:48 -07:00
Henry Cook c292a07ace Bugfix for merged voluntary releases in L2Cache. 
Track pending release beats for voluntary releases that are merged by Acquire Trackers.
Closes #23 and #24.
 2016-04-01 19:57:47 -07:00
Henry Cook 35d02c5096 LRSC fix. RocketChipNetwork moved to uncore. 2016-04-01 18:09:00 -07:00
Henry CookandAndrew Waterman 82bdf3afcb Fix LRSC starvation bug by punching Finish messages out to caching clients via a new TileLinkNetworkPort. 2016-04-01 16:17:27 -07:00
Henry CookandAndrew Waterman 78bc18736e LRSC startvation fix: HellaCache generates its own Finish messages again. 2016-04-01 16:04:25 -07:00
Henry Cook 54dd82ff76 bugfix for WB data buffer 2016-03-31 17:53:49 -07:00
Henry Cook c13b8d243d BroadcastHub race on allocating VolWBs vs Acquires 2016-03-17 18:32:35 -07:00
Henry Cook 5f3d3a0b2d Bugfix for probe flags in L2BroadcastHub 
Closes #25
 2016-03-17 16:42:40 -07:00
Henry Cook 49d82864bf Fix StoreDataQueue allocation bug in BroadcastHub 
Closes #27
 2016-03-17 12:31:18 -07:00
Henry Cook 67e711844a index extraction bug 2016-03-10 17:37:40 -08:00
Henry Cook 93773a4496 Refactor L2 transaction trackers to each be capable of processing Voluntary Writebacks. 
To elide several races between reading and writing the metadata array for different types of transactions, all L2XactTrackers can now sink Voluntary Releases (writebacks from the L1 in the current implementation). These writebacks are merged with the ongoing transaction, and the merging tracker supplies an acknowledgment of the writeback in addition to its ongoing activities. This change involved another refactoring of the control logic for allocating new trackers and routing incoming Acquires and Releases. BroadcastHub uses the new routing logic, but still processes all voluntary releases through the VoluntaryReleaseTracker (not a problem because there are no metadata update races).

Closes #18
Closes #20
 2016-03-10 17:14:34 -08:00
Henry Cook 7eef3393f1 fix bug resulting in different g_types on tail beats in L2CacheBank.io.inner.grant 2016-03-02 14:11:45 -08:00
Henry Cook 57370bdf49 first and last on HasTileLinkData 2016-03-02 14:11:39 -08:00
Henry CookandHoward Mao 929d8e31f7 refactor ready/valid logic for routing release messages in the l2 2016-02-19 16:30:26 -08:00
Henry Cook 2b977325e3 Make prefetch type available in a_type, issue probeInvalidates for putPrefetches 2015-11-16 23:26:13 -08:00
Henry Cook 0290635454 amo_shift_bits -> amo_shift_bytes 2015-11-16 19:07:58 -08:00
Henry Cook 485f1b7bd7 bump uncore 2015-11-16 18:14:03 -08:00
Henry Cook 64aaf71b06 L2AcquireTracker refactor to support merging Gets and Puts into Prefetches of the correct type. 
Transaction metadata for primary and seconday misses now stored in the secondary miss queue.

Added BuiltInAcquireBuilder factory.
 2015-11-16 18:10:09 -08:00
Henry Cook 03fa06e6e7 fix prefetch lockup on L2 hit 2015-11-15 12:51:34 -08:00
Henry Cook e3efc09b5b remove unnecessary UInt encode/decode on releaseMatches path 2015-11-05 17:20:03 -08:00
Henry Cook 3698153535 OHToUInt instead of PriorityEncoder on Acq/RelMatches signals in L2Bank 2015-11-03 14:31:35 -08:00
Henry Cook 9769b2747c now depend on external cde library rather than chisel.params (bump all submodules) 2015-10-21 18:24:16 -07:00
Henry Cook 47bc193c16 added CDE library as submodule 2015-10-21 18:24:16 -07:00
Henry Cook 4f8468b60f depend on external cde library 2015-10-21 18:19:23 -07:00
Henry Cook f8594da1d3 depend on external cde library 2015-10-21 18:17:17 -07:00
Henry Cook 9c3cd8f9fe depend on external cde library 2015-10-21 18:16:03 -07:00
Henry Cook 62765e9609 L2 rowBits param bugfix 2015-10-20 18:57:19 -07:00
Henry Cook 3fc630405b Vectorize RoCC and Tile memory interfaces (bump uncore, rocket, zscale) 2015-10-20 15:05:12 -07:00
Henry Cook 1a1185be3f Vectorize ROCC and Tile memory interfaces 2015-10-20 15:02:24 -07:00
Henry Cook 4389b9edb0 tilelink parameter tweak: addrBits now a constant 2015-10-20 15:00:30 -07:00
Henry Cook 8c3370c2e3 L2 AMOALU bugfix and simpler TileLinkParameters (bump rocket, uncore, zscale) 2015-10-16 19:15:47 -07:00
Henry Cook 6f8997bee9 Minor refactor of StoreGen/AMOALU. 2015-10-16 19:12:46 -07:00
Henry Cook 1441590c3b add enabled field to BTBParameters 2015-10-16 19:12:39 -07:00
Henry Cook d391f97953 Minor refactor of StoreGen/AMOALU. Bugfix for 32b ops in L2's AMOALU. 2015-10-16 19:11:06 -07:00
Henry Cook e1f573918d simplify TileLinkParameters with Option 2015-10-16 18:24:38 -07:00
Henry Cook 969ecaecf8 pass parameters to BuildRoCC 2015-10-14 14:16:47 -07:00
Henry Cook 4270fd78a5 Merge branch 'param-refactor-tl' 2015-10-14 12:16:22 -07:00
Henry Cook 68cb54bc68 refactor tilelink params 2015-10-14 12:14:36 -07:00
Henry Cook 7fa3eb95e3 refactor tilelink params 2015-10-14 12:13:37 -07:00
Henry Cook 66ea39638e GlobalAddrMap 2015-10-14 00:23:28 -07:00
Henry Cook 31be6407ec Removed all traces of params 2015-10-14 00:23:28 -07:00
Henry Cook 908922c1a4 refactor NASTI to not use param 2015-10-14 00:23:28 -07:00
Henry Cook da5fe84f53 Merge branch 'param-refactor' 2015-10-14 00:14:13 -07:00
Henry Cook dd5052888d refactor tilelink params, compiles but ExampleSmallConfig fails 2015-10-13 23:44:05 -07:00
Henry Cook 9d11b64c75 added HasAddrMapParameters and GlobalAddrMap 2015-10-06 18:24:08 -07:00
Henry Cook 4508666d96 log2ceil 2015-10-06 18:22:47 -07:00
Henry Cook 8173695800 added HasAddrMapParameters 2015-10-06 18:22:40 -07:00
Henry Cook 166df221ad added HasAddrMapParameters 2015-10-06 18:15:16 -07:00
Henry Cook 1c489d75c1 inject params at top-level for MemDessert 2015-10-06 16:26:58 -07:00
Henry Cook c4eadbda57 Removed all traces of params 2015-10-06 11:42:06 -07:00
Henry Cook 38ae2707a3 refactor MemIO to not use params 2015-10-06 11:41:48 -07:00
Henry Cook 3d10a89907 refactor NASTI to not use param; new AddrMap class 2015-10-06 11:41:47 -07:00
Henry Cook 84576650b5 Removed all traces of params 2015-10-05 21:48:05 -07:00
Henry Cook adcd77db36 Removed all traces of params 2015-10-05 20:33:55 -07:00
Henry Cook 970445a26a refactor MemIO to not use params 2015-10-02 15:37:41 -07:00
Henry Cook 69a4dd0a79 refactor NASTI to not use param 2015-10-02 14:20:47 -07:00
Henry Cook 39a749843c refactor NASTI to not use param; new AddrMap class 2015-10-02 14:19:51 -07:00
Henry Cook bcf95b39e0 bump uncore 2015-08-10 20:08:50 -07:00
Henry Cook 005752e2a6 use the parameters used to create the original object 2015-08-10 14:43:17 -07:00
Henry Cook a3c9431ee2 bump all submodules for scala version 2015-08-05 16:50:38 -07:00
Henry Cook 0c9a7817b6 Reduce outstanding mem accesses for FPGAConfig (to reduce MIFTagBits < 7) 2015-07-30 16:30:00 -07:00
Henry Cook 51c42083d0 Add new junctions repo as submodule (contains externally facing buses and peripherals). 
Bump all submodules.
 2015-07-29 18:15:45 -07:00
Henry Cook ee531dc97e Add missing changes to emulator/Makefile 2015-07-29 18:15:21 -07:00
Henry Cook d2a594fb57 new junctions repo has mem size constants 2015-07-29 18:05:54 -07:00
Henry Cook c70b495f6d moved buses to junctions repo 2015-07-29 18:04:30 -07:00
Henry Cook c27945c094 source and build files. source code pulled from uncore and zscale repos 2015-07-29 18:02:58 -07:00
Henry Cook 9d67ef4ee2 simplify .sbt files 2015-07-29 17:22:33 -07:00
Henry Cook 8b1ab23347 update README.md 2015-07-29 11:49:21 -07:00
Henry Cook 4daa20b5fe simplify .sbt files 2015-07-29 11:49:20 -07:00
Henry Cook d21ffa4dba Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used 2015-07-28 00:24:07 -07:00
Henry Cook 866396545d For vlsi, make Memdessert elaborate before Top so the generated Makefrag-tests doesn't get overwritten 2015-07-23 17:00:22 -07:00
Henry Cook bd4ff35a4b Upgrade sbt to 0.13.8, simplify build.scala Tasks, generate tests from TestGenerator App, set addons with env variable ROCKETCHIP_ADDONS 2015-07-22 11:49:10 -07:00
Henry Cook f5b3649b73 Merge commit 'd819fb28c3370747475d7c5f4b641723cab1fd0c' into rocc-fpu-port 2015-07-15 15:29:56 -07:00
Henry Cook 76046c52fe Cleanup testing rv64uf 2015-07-13 18:58:58 -07:00
Henry Cook 302cd3e638 Added BuildZscale param for use in Top and makefrag generation 2015-07-13 15:46:42 -07:00
Henry Cook 407d8e473e first cut at parameter-based testing 2015-07-13 14:54:26 -07:00
Henry Cook 4e4015089d rename Configs source 2015-07-09 15:04:11 -07:00
Henry Cook 3573fcdf2d bump uncore 2015-07-09 14:42:38 -07:00
Henry Cook fb91e3e1ab minor metadata API update (0.3.3) 2015-07-09 14:36:09 -07:00
Henry Cook 4fbb0f80ff Added some multicore/multibanks named ChiselConfigs 2015-07-06 18:21:06 -07:00
Henry Cook 854fd64fba Added optional Makefile includes for private chip repos 2015-07-06 17:15:27 -07:00
Henry Cook d3ccec1044 Massive update containing several months of changes from the now-defunct private chip repo. 
* Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API.
* Additional tests.
* New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit
* Updated TileLink protocol, NASTI protocol SHIMs.
* Lays groundwork for multiple top-level memory channels, superscalar fetch.
* Bump all submodules.
 2015-07-02 14:43:30 -07:00
Henry Cook d7cb60e8fa L2 WritebackUnit bug fix 2015-07-02 13:52:40 -07:00
Henry Cook f3a838cedf nasti converters, hub bugfix 2015-05-21 19:49:17 -07:00
Henry Cook c202449e34 first version NASTI IOs 2015-05-14 15:29:49 -07:00
Henry Cook 90c9ee7b04 fix unalloc putblocks 2015-05-14 12:37:35 -07:00
Henry Cook a7fa77c7fc track operand size for Gets 2015-05-13 23:28:18 -07:00
Henry Cook 172c372d3e L2 alloc cleanup 2015-05-12 17:14:06 -07:00
Henry Cook 5fdae2cb61 Merge branch 'master' of github.com:ucb-bar/uncore 2015-05-07 16:18:23 -07:00
Henry Cook fc883b5049 rm index.html 2015-05-07 16:17:40 -07:00
Henry Cook 8362eba00f Merge branch 'gh-pages' 2015-05-07 16:16:13 -07:00
Henry Cook aec24cf1a7 readme 2015-05-07 16:16:07 -07:00
Henry Cook 90ced93eeb Merge branch 'master' into gh-pages 2015-05-07 12:35:14 -07:00
Henry Cook 4cef8c9cd4 Added MemIOArbiter 2015-05-07 10:55:38 -07:00
Henry Cook 8832b454ce add plugins to make scala doc site and publish to ghpages 2015-04-29 15:34:56 -07:00
Henry Cook 1e05fc0525 First pages commit 2015-04-29 13:18:26 -07:00
Henry Cook 3673295d03 network shim cleanup 2015-04-27 16:59:30 -07:00
Henry Cook 09e30041ed Voluntary Writeback tracker rewrite 2015-04-27 12:56:33 -07:00
Henry Cook 11b5222d01 Refactored WritebackUnit 2015-04-21 22:23:04 -07:00
Henry Cook 4c7969b2b3 Metadata docs and api cleanup 2015-04-20 16:32:09 -07:00