riscv/rocket-chip
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refactor MemIO to not use params

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This commit is contained in:
Henry Cook 2015-10-02 15:38:14 -07:00
parent 3d10a89907
commit 38ae2707a3
3 changed files with 5 additions and 5 deletions
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2
junctions

@ -1 +1 @@
Subproject commit 52be2a2c019931de304c5701e694f243ef018e75
Subproject commit 372e80574bc42d8b623f69b2d5bd995aa5d0a759

2
src/main/scala/RocketChip.scala
View File

@ -60,7 +60,7 @@ class BasicTopIO extends Bundle {
val mem_backup_ctrl = new MemBackupCtrlIO
}
class TopIO extends BasicTopIO {
class TopIO(implicit val p: Parameters) extends BasicTopIO {
val mem = new MemIO
}

6
src/main/scala/Vlsi.scala
View File

@ -6,9 +6,9 @@ import Chisel._
import junctions._
import uncore._
class MemDessert extends Module {
val io = new MemDesserIO(params(HTIFWidth))
val x = Module(new MemDesser(params(HTIFWidth)))
class MemDessert(implicit val p: Parameters) extends Module {
val io = new MemDesserIO(p(HTIFWidth))
val x = Module(new MemDesser(p(HTIFWidth)))
io.narrow <> x.io.narrow
io.wide <> x.io.wide
}