riscv/rocket-chip
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Author SHA1 Message Date
Henry Cook 9769b2747c now depend on external cde library rather than chisel.params (bump all submodules) 2015-10-21 18:24:16 -07:00
Henry Cook 47bc193c16 added CDE library as submodule 2015-10-21 18:24:16 -07:00
Henry Cook 62765e9609 L2 rowBits param bugfix 2015-10-20 18:57:19 -07:00
Henry Cook 3fc630405b Vectorize RoCC and Tile memory interfaces (bump uncore, rocket, zscale) 2015-10-20 15:05:12 -07:00
Henry Cook 8c3370c2e3 L2 AMOALU bugfix and simpler TileLinkParameters (bump rocket, uncore, zscale) 2015-10-16 19:15:47 -07:00
Henry Cook 4270fd78a5 Merge branch 'param-refactor-tl' 2015-10-14 12:16:22 -07:00
Henry Cook dd5052888d refactor tilelink params, compiles but ExampleSmallConfig fails 2015-10-13 23:44:05 -07:00
Henry Cook 9d11b64c75 added HasAddrMapParameters and GlobalAddrMap 2015-10-06 18:24:08 -07:00
Henry Cook 1c489d75c1 inject params at top-level for MemDessert 2015-10-06 16:26:58 -07:00
Henry Cook c4eadbda57 Removed all traces of params 2015-10-06 11:42:06 -07:00
Henry Cook 38ae2707a3 refactor MemIO to not use params 2015-10-06 11:41:48 -07:00
Henry Cook 3d10a89907 refactor NASTI to not use param; new AddrMap class 2015-10-06 11:41:47 -07:00
Henry Cook bcf95b39e0 bump uncore 2015-08-10 20:08:50 -07:00
Henry Cook a3c9431ee2 bump all submodules for scala version 2015-08-05 16:50:38 -07:00
Henry Cook 0c9a7817b6 Reduce outstanding mem accesses for FPGAConfig (to reduce MIFTagBits < 7) 2015-07-30 16:30:00 -07:00
Henry Cook 51c42083d0 Add new junctions repo as submodule (contains externally facing buses and peripherals). 
Bump all submodules.
 2015-07-29 18:15:45 -07:00
Henry Cook ee531dc97e Add missing changes to emulator/Makefile 2015-07-29 18:15:21 -07:00
Henry Cook d21ffa4dba Streamline makefiles for more robust test dependency generation. Note: emulator/generated-src-debug no longer used 2015-07-28 00:24:07 -07:00
Henry Cook 866396545d For vlsi, make Memdessert elaborate before Top so the generated Makefrag-tests doesn't get overwritten 2015-07-23 17:00:22 -07:00
Henry Cook bd4ff35a4b Upgrade sbt to 0.13.8, simplify build.scala Tasks, generate tests from TestGenerator App, set addons with env variable ROCKETCHIP_ADDONS 2015-07-22 11:49:10 -07:00
Henry Cook 76046c52fe Cleanup testing rv64uf 2015-07-13 18:58:58 -07:00
Henry Cook 302cd3e638 Added BuildZscale param for use in Top and makefrag generation 2015-07-13 15:46:42 -07:00
Henry Cook 407d8e473e first cut at parameter-based testing 2015-07-13 14:54:26 -07:00
Henry Cook 4e4015089d rename Configs source 2015-07-09 15:04:11 -07:00
Henry Cook 3573fcdf2d bump uncore 2015-07-09 14:42:38 -07:00
Henry Cook 4fbb0f80ff Added some multicore/multibanks named ChiselConfigs 2015-07-06 18:21:06 -07:00
Henry Cook 854fd64fba Added optional Makefile includes for private chip repos 2015-07-06 17:15:27 -07:00
Henry Cook d3ccec1044 Massive update containing several months of changes from the now-defunct private chip repo. 
* Adds support for a L2 cache with directory bits for tracking L1 coherence (DefaultL2Config), and new metadata-based coherence API.
* Additional tests.
* New virtual memory implementation, priviliged architecture (1.7), custom CSRs, FDivSqrt unit
* Updated TileLink protocol, NASTI protocol SHIMs.
* Lays groundwork for multiple top-level memory channels, superscalar fetch.
* Bump all submodules.
 2015-07-02 14:43:30 -07:00
Henry CookandYunsup Lee 23ae6893ad bump chisel 2014-10-06 13:45:03 -07:00
Henry CookandYunsup Lee f97a801d60 Parameter API update 2014-10-06 13:37:42 -07:00
Henry CookandYunsup Lee 122733b3a9 file name consistency 2014-10-06 13:37:38 -07:00
Henry CookandYunsup Lee a9d72aac2a bump rocket 2014-10-06 13:37:27 -07:00
Henry CookandYunsup Lee 0b5f23a209 Streamlined uncore for release 2014-10-06 13:37:15 -07:00
Henry CookandYunsup Lee 7398b00d93 dir supplied by function 2014-09-25 06:50:41 -07:00
Henry CookandYunsup Lee db4de7b806 bump chisel 2014-09-25 06:50:36 -07:00
Henry CookandYunsup Lee 5a840c5520 support for multiple tilelink paramerterizations in same design 2014-09-25 06:50:30 -07:00
Henry Cook ae05125f29 Adjustements to top-level parameters and knobs for hwacha 2014-09-07 17:57:33 -07:00
Henry Cook 4126678c9d Merge branch 'dse' 
Conflicts:
	rocket
	uncore
 2014-09-06 06:59:14 -07:00
Henry Cook 82467313dd merge in rocketchip changes from master 2014-09-02 13:51:57 -07:00
Henry Cook 3250db0dd5 bump uncore 2014-09-02 12:37:44 -07:00
Henry Cook 8622eb0f5b bump rocket 2014-09-01 13:34:15 -07:00
Henry Cook 78ab83d224 refactor fpga top/config 2014-08-28 13:07:54 -07:00
Henry Cook bf356b9cb4 Refactor to combine fpga and vlsi tops, part 1 2014-08-24 19:30:53 -07:00
Henry Cook a41d55b643 Final parameter refactor. 2014-08-23 01:26:03 -07:00
Henry Cook 9b36162b67 Point rocket/ to rocket-staging repo 2014-08-19 14:20:15 -07:00
Henry Cook 2741bbf2b9 Point rocket/ to rocket-staging repo 2014-08-19 13:53:24 -07:00
Henry Cook 1563c1bb36 Fixed cache params. Asm and bmark tests pass. 2014-08-12 15:00:54 -07:00
Henry Cook 910c886837 bump chisel 2014-08-12 14:53:19 -07:00
Henry Cook 74796868e7 chisel bump 2014-08-12 10:58:09 -07:00
Henry Cook 0ca24a5d91 fix debug flags 2014-08-12 10:35:39 -07:00
Henry Cook 7f07771600 Cache utility traits. Completely compiles, asm tests hang. 2014-08-11 18:37:10 -07:00
Henry Cook 1983260e6f a few more fixes. some param lookups fail (here() in Alter blocks) 2014-08-10 23:08:21 -07:00
Henry Cook 63bd0b9d2a Partial conversion to params. Compiles but does not elaborate. Rocket and uncore conversion complete. FPGA and VLSI config are identical. HwachaConfig and MemoryControllerConfig not yet removed. 2014-08-08 12:27:47 -07:00
Henry Cook 434da22283 Refactored Metadata, expanded coherence API (bump rocket, uncore, chisel) 2014-05-28 17:16:49 -07:00
Henry Cook b0ccb88982 make outer cache type choice a top-level const 2014-05-28 14:46:07 -07:00
Henry Cook f8b3117ac0 bump rocket, uncore 2014-05-06 13:10:12 -07:00
Henry Cook 445d4f2eee bump rocket, uncore 2014-05-01 01:46:55 -07:00
Henry Cook ce056b4b89 client/master -> inner/outer 2014-04-29 16:50:30 -07:00
Henry Cook 224e286dd3 New uncore config objects. Backends get their own file. Simplify fpga uncore. 2014-04-26 19:46:11 -07:00
Henry Cook 3d4273954a TileLinkIO.GrantAck -> TileLinkIO.Finish 2014-04-26 15:19:25 -07:00
Henry Cook fbf6e44376 fix connection error in fpga uncore 2014-04-24 11:58:59 -07:00
Henry Cook 1e062d1bcd bump rocket, uncore 2014-04-23 16:27:34 -07:00
Henry Cook 83a3cb4999 bump rocket, uncore 2014-04-22 17:32:39 -07:00
Henry Cook cfd6748318 patches to make FAME1/dram IOs compile with up-to-date chisel (bumped) 2014-04-21 17:26:33 -07:00
Henry Cook 1bf5439f0b include new mm test in benchmarks 2014-04-18 18:05:30 -07:00
Henry Cook 691aa4107e bump rocket 2014-04-14 17:13:57 -07:00
Henry Cook 2cb4dbae39 Refactored uncore constants and tilelink data 2014-04-10 13:19:50 -07:00
Henry Cook 5a5f69bfca finished uncore constant/tilelink data refactor 2014-04-10 13:13:46 -07:00
Henry Cook 56f515c255 first steps in uncore constant/tilelink data refactor 2014-03-30 09:21:08 -07:00
Henry Cook 382fa0ef27 cleanups supporting uncore hierarchy 2014-01-31 16:03:58 -08:00
Henry Cook fc9c676fc1 add chisel and hardfloat back as sub-projects, bump other sub-projects 2013-09-26 12:01:46 -07:00
Henry Cook b42e140e05 NetworkIOs no longer use thunks 2013-09-10 16:23:52 -07:00
Henry Cook 6aa500fc16 dont make assumptions about default project name when invoking sbt 2013-08-20 12:56:01 -07:00
Henry Cook b06d33da2f Canonicalized sbt, updated makefiles, cleaned up submodules, minor bugfixes 2013-08-19 19:54:41 -07:00
Henry Cook 85e5ce046f pulled submodule commits, uncore sbt standardized 2013-08-15 17:07:13 -07:00
Henry Cook 6b20556661 Merge branch 'chisel-v2' of github.com:ucb-bar/reference-chip into chisel-v2 
Conflicts:
	chisel
	riscv-hwacha
	riscv-rocket
	uncore
 2013-08-15 16:39:30 -07:00
Henry Cook 784e017bae Final Reg standardization 2013-08-15 16:37:58 -07:00
Henry Cook 9b70ecf546 Reg standardization 2013-08-13 17:53:19 -07:00
Henry Cook 11e131af47 initial attempt at upgrade 2013-08-12 10:46:22 -07:00
Henry Cook 199e76fc77 Fold uncore constants into TileLinkConfiguration, update coherence API 2013-08-02 16:31:27 -07:00
Henry Cook 4d916b56e3 Bump scala to 2.10.2, sbt to 0.13-RC2, including new launcher. Upgrade reflection in network.scala to 2.10 lib. Constants now obtained from subproject package objects. Give network its own file. 2013-07-24 23:28:43 -07:00
Henry Cook 2796de01bf new tilelink arbiter types, reduced release xact trackers 2013-07-09 15:41:27 -07:00
Henry Cook 896179cbb6 removed bad mt test 2013-06-14 00:14:18 -07:00
Henry Cook 85fbb650c9 makefile support for new multithreading tests 2013-06-13 15:34:54 -07:00