de492b3cf7
Fix critical path through integer scoreboard
Andrew Waterman
2014-04-15 21:26:54 -07:00
e4c97e7a57
push tools/tests
Yunsup Lee
2014-04-14 21:18:22 -07:00
691aa4107e
bump rocket
Henry Cook
2014-04-14 17:13:57 -07:00
444d0449e3
io.cnt bug in serializer
Henry Cook
2014-04-14 17:12:30 -07:00
2cb4dbae39
Refactored uncore constants and tilelink data
Henry Cook
2014-04-10 13:19:50 -07:00
5a5f69bfca
finished uncore constant/tilelink data refactor
Henry Cook
2014-04-10 13:13:46 -07:00
b1df49ba30
removed AddressSpaceConstants, CacheConstants, and TileLinkSizeConstants
Henry Cook
2014-04-01 17:14:45 -07:00
fbca7c6bb3
refactor ioMem and associcated constants. merge Aqcuire and AcquireData
Henry Cook
2014-03-29 10:53:49 -07:00
1da8ef2ddf
Added serdes to decouple cache row size from tilelink data size
Henry Cook
2014-04-07 18:22:46 -07:00
910b3b203a
removed AddressSpaceConstants, CacheConstants, and TileLinkSizeConstants
Henry Cook
2014-04-01 17:15:46 -07:00
ebdc0a2692
merge Aqcuire and AcquireData. cache line size coupled to tilelink data size
Henry Cook
2014-03-29 10:59:07 -07:00
cac04afc25
Push riscv-tests, riscv-tools. Repository now consistent such that all tests build, pass in spike, in emulator, and in RTL.
Stephen Twigg
2014-04-08 22:14:16 -07:00
f643d38672
Push rocket, riscv-tests, riscv-tools to consistent state (toolchain rebuild required)
Stephen Twigg
2014-04-08 16:50:52 -07:00
e90f2484aa
Sync with riscv-opcodes (csr register mapping)
Stephen Twigg
2014-04-08 15:48:37 -07:00
fb8c7d3da5
Push rocket
Andrew Waterman
2014-04-07 23:49:06 -07:00
3ed8adf032
Add early out for MUL[W] (not MULH[[S]U])
Andrew Waterman
2014-04-07 23:48:02 -07:00
927287da34
Bypass RAS push/pop
Andrew Waterman
2014-04-07 23:47:53 -07:00
817517c663
Better branch prediction
Andrew Waterman
2014-04-07 16:08:06 -07:00
f235fa0db6
Move branch resolution to M stage
Andrew Waterman
2014-04-07 15:58:49 -07:00
db59fc65ab
Add return address stack
Andrew Waterman
2014-04-01 15:01:27 -07:00
56f515c255
first steps in uncore constant/tilelink data refactor
Henry Cook
2014-03-30 08:13:05 -07:00
e3b12e0b85
Make BTB more complexity-effective
Andrew Waterman
2014-03-25 05:22:04 -07:00
804b09c8c5
Frontend QoR tweaks
Andrew Waterman
2014-03-25 05:20:24 -07:00
6465e2df14
Make Int -> Bool conversions explicit
Andrew Waterman
2014-03-24 04:36:53 -07:00
1b030777ce
Remove vestigial control signal
Andrew Waterman
2014-03-24 04:36:12 -07:00
16274a84b6
update fpga testbench
Donggyu Kim
2014-03-21 16:21:15 -07:00
d2c32b048a
fix bug in htif_fini, need to use vc_handle!
Yunsup Lee
2014-03-18 01:35:08 -07:00
0d124d283a
Write our own vcs main() routine
Andrew Waterman
2014-03-17 17:02:28 -07:00
7f23257873
Print out random seed if test fails
Andrew Waterman
2014-03-17 15:35:17 -07:00
fcbbb275aa
Fix nondeterminism
Andrew Waterman
2014-03-15 17:35:30 -07:00
54cbf0c4f1
Add (unused) RV32 CSRs
Andrew Waterman
2014-03-15 17:33:17 -07:00
943d7ac80a
Use LinkedHashSet/Map for simpler determinism
Andrew Waterman
2014-03-15 17:31:48 -07:00
53d62cb69d
remove nondeterminism
Donggyu Kim
2014-03-15 16:45:58 -07:00
e4b56b5d0e
generate verilog for rekall
Yunsup Lee
2014-03-15 15:31:04 -07:00
b6bf7cfe0c
push chisel
Andrew Waterman
2014-03-11 23:56:57 -07:00
7ac003a4f7
push hardfloat
Andrew Waterman
2014-03-11 20:36:39 -07:00
f04bde75fb
New FP encoding
Andrew Waterman
2014-03-11 19:12:20 -07:00
a0389645b7
New FP encoding; improved FP implementation
Andrew Waterman
2014-03-11 18:58:24 -07:00
00bc1a2293
Add fclass.{s|d} instructions
Andrew Waterman
2014-03-10 16:59:07 -07:00
6951333a08
push rocket
Yunsup Lee
2014-03-04 23:43:00 -08:00
ac4b3f9f22
print out core id
Yunsup Lee
2014-03-04 23:38:49 -08:00
d055c0ebaf
Push rocket/hardfloat/chisel
Andrew Waterman
2014-03-04 16:38:34 -08:00
9f2e16c58a
Fix D$ arbiter for >2 inputs
Andrew Waterman
2014-03-04 16:32:17 -08:00
fa75f6e81e
Fix null pointer exception when HAS_FPU=false
Andrew Waterman
2014-03-04 16:32:09 -08:00
23045ec379
add hwacha vfmsv instructions, keepcfg bug fix, turn off secondary fconv
Yunsup Lee
2014-03-02 03:38:06 -08:00
49f0e43ed1
push riscv-tools
Yunsup Lee
2014-03-01 03:31:03 -08:00
e20d50436a
committed in the wrong directory, meant to commit in the hwacha directory
Yunsup Lee
2014-03-01 00:01:35 -08:00
8c459df3b6
flush deck when xcpt occurs, fixes remaining p test bugs
Yunsup Lee
2014-02-28 22:50:34 -08:00
cb14baab88
Reformatted hammer directory, added parent scripts to repo, as well as README.
Adam Izraelevitz
2014-02-28 15:57:46 -08:00
c7110c8389
Make FPU pipeline depths configurable
Andrew Waterman
2014-02-28 13:39:35 -08:00
0c4442c172
push tests/tools
Yunsup Lee
2014-02-27 20:28:19 -08:00
bcfcdefe88
update hwacha
Yunsup Lee
2014-02-27 04:39:12 -08:00
46714c0c60
more improvements to hwacha
Yunsup Lee
2014-02-26 21:20:53 -08:00
a5625de3d5
support vector irq tests
Yunsup Lee
2014-02-25 21:18:03 -08:00
fcfc1078f8
Merge branch 'master' of github.com:ucb-bar/reference-chip
Ben Keller
2014-02-25 15:54:19 -08:00
220076506c
push hwacha; all vector p/v/pt tests work now
Yunsup Lee
2014-02-25 03:51:15 -08:00
e5c2bd5e7b
add extensions option to riscv-dis for better disassembly
Yunsup Lee
2014-02-25 03:50:32 -08:00
98b830201a
add wen signal to dasm printf
Yunsup Lee
2014-02-25 03:31:06 -08:00
8acc9510c4
push hwacha,chisel
Yunsup Lee
2014-02-24 01:43:55 -08:00
22345dd073
push rocket,hwacha
Yunsup Lee
2014-02-22 22:53:24 -08:00
97b1841fcf
change dcache tag bits to 7
Yunsup Lee
2014-02-22 22:53:04 -08:00
f14f386b4f
Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
Adam Izraelevitz
2014-02-19 15:50:28 -08:00
a006bffca4
Merge branch 'master' of github.com:ucb-bar/reference-chip into dse
Adam Izraelevitz
2014-02-19 15:04:03 -08:00
58d2e62e3f
Merge branch 'master' of github.com:ucb-bar/reference-chip into dse
Adam Izraelevitz
2014-02-19 14:24:36 -08:00
de965d558a
Renumber uarch CSRs into custom CSR space
Andrew Waterman
2014-02-14 17:40:58 -08:00
e554f6728d
Update chisel
Andrew Waterman
2014-02-12 18:40:05 -08:00
8e3ca609f7
Renumber uarch CSRs into custom CSR space
Andrew Waterman
2014-02-14 17:40:00 -08:00
755293d785
Push hwacha (refactoring) and add line that when uncommented properly instantiates hwacha).
Stephen Twigg
2014-02-14 10:12:09 -08:00
02dbd6b0aa
Don't assign to your own inputs
Andrew Waterman
2014-02-12 18:39:40 -08:00
6808245bb5
Timeout cycles now defined in toplevel Makefrag in order to allow for easier alteration when debugging.
Stephen Twigg
2014-02-12 16:50:13 -08:00
e25c54e998
Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
Adam Izraelevitz
2014-02-12 13:52:24 -08:00
c1e544886f
Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
Adam Izraelevitz
2014-02-12 13:35:12 -08:00
1a03a64572
Merge branch 'dse' of github.com:ucb-bar/reference-chip into dse
Adam Izraelevitz
2014-02-12 12:44:30 -08:00
aae5f465c1
Merge branch 'master' of github.com:ucb-bar/reference-chip into dse
Adam Izraelevitz
2014-02-11 17:31:55 -08:00
548cf16061
Added jack Makefile and hammer.scala, as well as changed reference chip to have multiple datacache sizes. Requires chisel branch dse
Adam Izraelevitz
2014-02-11 14:36:47 -08:00
0ebb115a3c
Revert to old AUIPC definition
Andrew Waterman
2014-02-10 19:05:14 -08:00
a09ff9fdc7
Revert to old AUIPC definition
Andrew Waterman
2014-02-10 19:04:42 -08:00
cda46b3ce1
use --recursive to populate all submodules. with current instructions you can't run tests because riscv-tests/env isn't pulled in
Scott Beamer
2014-02-06 16:20:48 -08:00
1456170c6d
Always stall decode on RoCC -> FENCE; never stall on RoCC -> deferred AMO.RL fence
Andrew Waterman
2014-02-06 12:01:49 -08:00