riscv/rocket-chip
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Fix sign of remainder when dividing by zero

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h/t chris
This commit is contained in:
Andrew Waterman 2014-04-18 16:30:25 -07:00
parent 1fa505f9ff
commit 09e2ec1f9e
1 changed files with 1 additions and 1 deletions
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2
rocket/src/main/scala/multiplier.scala
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@ -122,7 +122,7 @@ class MulDiv(mulUnroll: Int = 1, earlyOut: Boolean = false)(implicit conf: Rocke
remainder := remainder(w-1,0) << shift
count := shift
}
when (count === 0 && !less /* divby0 */) { neg_out := false }
when (count === 0 && !less /* divby0 */ && !isHi) { neg_out := false }
}
when (io.resp.fire() || io.kill) {
state := s_ready