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Commit Graph

1011 Commits

Author SHA1 Message Date
78579672d3 make mtvec configurable and writeable 2016-01-29 14:51:56 -08:00
7937fbf074 fix number of IOMSHRs at 1 2016-01-29 14:51:56 -08:00
305185c034 send DMA requests through MMIO and get responses through CSRs 2016-01-29 14:51:56 -08:00
58fcc6b7c6 Get rid of useless mux 2016-01-28 11:44:59 -08:00
d170fcd913 DecoupledHelper is now imported from junctions 2016-01-21 15:38:43 -08:00
52d6b0b1a5 Improve ALU QoR
Rejigger muxes; share XOR gates between ADD/SUB, XOR, and BEQ.
2016-01-20 17:42:31 -08:00
77e068c153 fix Chisel3 compat issue in SimpleHellaCacheIF 2016-01-14 22:42:44 -08:00
120361226d fix more Chisel3 deprecations 2016-01-14 14:46:31 -08:00
d51c127646 fix deprecation warnings in rocket.scala 2016-01-13 22:08:06 -08:00
ae98af7077 don't mix SInt/UInt 2016-01-12 16:27:36 -08:00
00d17abd78 Don't ignore data value when writing MIPI 2016-01-12 16:23:06 -08:00
7bf503a275 Remove four integer/FP converters 2016-01-12 16:06:23 -08:00
31d537c405 Add missing cloneType 2016-01-12 15:45:11 -08:00
13ce91e453 fix Chisel3 compat warnings in ICache and FPU 2016-01-12 12:43:48 -08:00
05b359d357 support streaming DMA in DMA frontend 2016-01-06 18:17:41 -08:00
dbe68056d9 Merge pull request #21 from ucb-bar/dma
Implement client-side DMA controller
2015-12-22 10:33:28 -05:00
304d8b814a Implement client-side DMA controller 2015-12-16 21:24:24 -08:00
01a3447989 Remove duplicate PseudoLRU class from rocket TLB 2015-12-16 16:12:47 -08:00
7690de07e1 allow icache to configure which side of the way mux gets buffered 2015-12-02 17:17:49 -08:00
369ee74a2c change names of RoCC tilelink interfaces to be more sensible 2015-12-02 16:28:23 -08:00
f67b02fadb Merge branch 'rocc-fpu-port' 2015-12-02 08:52:15 -08:00
73b0263663 disconnect fpu port if no fpu-using RoCC accelerators 2015-12-01 20:41:58 -08:00
3f8f726296 make rocc build independent from parameter structure 2015-12-01 18:47:52 -08:00
dcca0b1d86 fix up FPU connection 2015-12-01 18:14:58 -08:00
08f77ca90d Merge branch 'master' into rocc-fpu-port 2015-12-01 18:00:28 -08:00
e76dfa55f7 change the way rocc is parameterized 2015-12-01 17:54:56 -08:00
4833d41dbc make the connection of FPU ports optional per accelerator 2015-12-01 16:48:05 -08:00
0b15b19381 add arbiter for FPU 2015-12-01 10:22:31 -08:00
1db2da00f3 Merge branch 'master' into rocc-fpu-port 2015-11-30 19:18:58 -08:00
e80340198a use implicit parameters for ALU 2015-11-30 17:35:33 -08:00
90991014a0 Merge pull request #19 from ucb-bar/multirocc
Add support for multiple RoCC accelerators
2015-11-28 08:56:04 -05:00
9256239206 implement support for multiple RoCC accelerators 2015-11-26 12:46:01 -08:00
58b0a86834 some modifications to AccumulatorExample 2015-11-26 08:48:19 -08:00
e203b8b378 Make ALU generic for zscale 2015-11-24 19:17:07 -08:00
5294e94794 Remove CSR back pressure ability
We were using it for IPIs, but no longer need it.
2015-11-24 18:28:14 -08:00
4616db4695 Make RegFile/ImmGen usable by zscale 2015-11-24 18:27:07 -08:00
6d1bf5c014 Use generic LoadGen/StoreGen 2015-11-24 18:13:33 -08:00
65632c875a Merge branch 'master' into rocc-fpu-port 2015-11-21 02:24:38 -08:00
b0a06a77db fix a few Chisel3 compat issues 2015-11-20 13:33:15 -08:00
94d2dd3053 Merge remote-tracking branch 'origin/master' into rocc-fpu-port 2015-11-16 23:29:25 -08:00
0f092b9b59 Remove IPI network
This is now provided via MMIO.
2015-11-16 21:51:43 -08:00
5e2698adbc Merge remote-tracking branch 'origin/master' into rocc-fpu-port 2015-11-14 16:44:55 -08:00
213c1a4c81 fix fdiv/fsqrt control bug in fpu 2015-11-14 16:43:15 -08:00
4dd097d156 Merge remote-tracking branch 'origin/master' into rocc-fpu-port 2015-11-14 14:52:13 -08:00
3c3c946755 move to new version of hardfloat 2015-11-14 14:49:17 -08:00
608e4b2851 Merge remote-tracking branch 'origin/master' into rocc-fpu-port 2015-11-12 20:44:25 -08:00
19daee10f0 use default constructors for IOMSHR acquire construction 2015-11-12 15:54:05 -08:00
59ca373146 Merge pull request #18 from jackkoenig/master
Fix SimpleHellaCacheIF assumption about receiving rejected request ba…
2015-11-08 22:38:01 -08:00
1e259a55da Fix SimpleHellaCacheIF assumption about receiving rejected request back 2 cycles later 2015-11-08 21:16:31 -08:00
df5daaa72e Merge remote-tracking branch 'origin/master' into rocc-fpu-port 2015-11-06 23:57:42 -08:00