use default constructors for IOMSHR acquire construction
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@ -169,26 +169,33 @@ class IOMSHR(id: Int)(implicit p: Parameters) extends L1HellaCacheModule()(p) {
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val beat_mask = (storegen.mask << Cat(beat_offset, UInt(0, wordOffBits)))
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val beat_data = Fill(beatWords, storegen.data)
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val addr_byte = req.addr(beatOffBits - 1, 0)
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val a_type = Mux(isRead(req.cmd), Acquire.getType, Acquire.putType)
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val union = Mux(isRead(req.cmd),
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Cat(addr_byte, req.typ, M_XRD), beat_mask)
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val s_idle :: s_acquire :: s_grant :: s_resp :: Nil = Enum(Bits(), 4)
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val state = Reg(init = s_idle)
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io.req.ready := (state === s_idle)
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io.acquire.valid := (state === s_acquire)
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io.acquire.bits := Acquire(
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is_builtin_type = Bool(true),
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a_type = a_type,
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val addr_block = req.addr(paddrBits - 1, blockOffBits)
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val addr_beat = req.addr(blockOffBits - 1, beatOffBits)
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val addr_byte = req.addr(beatOffBits - 1, 0)
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val get_acquire = Get(
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client_xact_id = UInt(id),
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addr_block = req.addr(paddrBits - 1, blockOffBits),
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addr_beat = req.addr(blockOffBits - 1, beatOffBits),
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addr_block = addr_block,
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addr_beat = addr_beat,
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addr_byte = addr_byte,
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operand_size = req.typ,
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alloc = Bool(false))
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val put_acquire = Put(
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client_xact_id = UInt(id),
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addr_block = addr_block,
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addr_beat = addr_beat,
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data = beat_data,
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// alloc bit should always be false
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union = Cat(union, Bool(false)))
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wmask = beat_mask,
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alloc = Bool(false))
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io.acquire.valid := (state === s_acquire)
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io.acquire.bits := Mux(isRead(req.cmd), get_acquire, put_acquire)
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io.resp.valid := (state === s_resp)
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io.resp.bits := req
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