Andrew Waterman
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8d1ba4d1ec
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Remove hard-coded XLEN values from D$
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2016-03-24 14:52:12 -07:00 |
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Andrew Waterman
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7ae44d4905
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Add RV32 support
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2016-03-10 17:32:00 -08:00 |
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Andrew Waterman
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82c595d11a
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Fix no-FPU elaboration of CSR file
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2016-03-10 17:30:56 -08:00 |
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Andrew Waterman
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bc15e8649e
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WIP on priv spec v1.9
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2016-03-02 23:29:58 -08:00 |
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Andrew Waterman
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091782ad27
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Merge pull request #29 from ucb-bar/rocc-ptw-refactoring
RoCC PTW refactoring
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2016-02-25 17:57:22 -08:00 |
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Yunsup Lee
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15ac4d317f
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RoCC PTW refactoring
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2016-02-25 17:15:38 -08:00 |
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Christopher Celio
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b96343a4e5
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[btb] fix mix type error for fetch-width > 1
closes #24
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2016-02-08 17:41:38 -08:00 |
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Christopher Celio
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31dd311aff
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[fpu] fix rounding mode bug in fdivfsqrt
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2016-02-08 17:38:31 -08:00 |
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Howard Mao
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5abfd1a4ab
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make sure to check for region violations in DMA frontend
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2016-02-03 15:40:44 -08:00 |
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Howard Mao
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78579672d3
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make mtvec configurable and writeable
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2016-01-29 14:51:56 -08:00 |
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Howard Mao
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7937fbf074
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fix number of IOMSHRs at 1
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2016-01-29 14:51:56 -08:00 |
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Howard Mao
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305185c034
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send DMA requests through MMIO and get responses through CSRs
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2016-01-29 14:51:56 -08:00 |
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Andrew Waterman
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58fcc6b7c6
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Get rid of useless mux
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2016-01-28 11:44:59 -08:00 |
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Howard Mao
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d170fcd913
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DecoupledHelper is now imported from junctions
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2016-01-21 15:38:43 -08:00 |
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Andrew Waterman
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52d6b0b1a5
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Improve ALU QoR
Rejigger muxes; share XOR gates between ADD/SUB, XOR, and BEQ.
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2016-01-20 17:42:31 -08:00 |
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Howard Mao
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77e068c153
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fix Chisel3 compat issue in SimpleHellaCacheIF
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2016-01-14 22:42:44 -08:00 |
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Howard Mao
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120361226d
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fix more Chisel3 deprecations
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2016-01-14 14:46:31 -08:00 |
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Howard Mao
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d51c127646
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fix deprecation warnings in rocket.scala
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2016-01-13 22:08:06 -08:00 |
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Andrew Waterman
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ae98af7077
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don't mix SInt/UInt
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2016-01-12 16:27:36 -08:00 |
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Andrew Waterman
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00d17abd78
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Don't ignore data value when writing MIPI
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2016-01-12 16:23:06 -08:00 |
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Andrew Waterman
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7bf503a275
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Remove four integer/FP converters
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2016-01-12 16:06:23 -08:00 |
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Andrew Waterman
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31d537c405
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Add missing cloneType
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2016-01-12 15:45:11 -08:00 |
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Howard Mao
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13ce91e453
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fix Chisel3 compat warnings in ICache and FPU
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2016-01-12 12:43:48 -08:00 |
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Howard Mao
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05b359d357
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support streaming DMA in DMA frontend
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2016-01-06 18:17:41 -08:00 |
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Howard Mao
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dbe68056d9
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Merge pull request #21 from ucb-bar/dma
Implement client-side DMA controller
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2015-12-22 10:33:28 -05:00 |
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Howard Mao
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304d8b814a
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Implement client-side DMA controller
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2015-12-16 21:24:24 -08:00 |
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Albert Magyar
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01a3447989
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Remove duplicate PseudoLRU class from rocket TLB
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2015-12-16 16:12:47 -08:00 |
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Howard Mao
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7690de07e1
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allow icache to configure which side of the way mux gets buffered
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2015-12-02 17:17:49 -08:00 |
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Howard Mao
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369ee74a2c
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change names of RoCC tilelink interfaces to be more sensible
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2015-12-02 16:28:23 -08:00 |
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Howard Mao
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f67b02fadb
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Merge branch 'rocc-fpu-port'
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2015-12-02 08:52:15 -08:00 |
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Howard Mao
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73b0263663
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disconnect fpu port if no fpu-using RoCC accelerators
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2015-12-01 20:41:58 -08:00 |
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Howard Mao
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3f8f726296
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make rocc build independent from parameter structure
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2015-12-01 18:47:52 -08:00 |
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Howard Mao
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dcca0b1d86
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fix up FPU connection
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2015-12-01 18:14:58 -08:00 |
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Howard Mao
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08f77ca90d
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Merge branch 'master' into rocc-fpu-port
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2015-12-01 18:00:28 -08:00 |
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Howard Mao
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e76dfa55f7
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change the way rocc is parameterized
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2015-12-01 17:54:56 -08:00 |
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Howard Mao
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4833d41dbc
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make the connection of FPU ports optional per accelerator
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2015-12-01 16:48:05 -08:00 |
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Howard Mao
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0b15b19381
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add arbiter for FPU
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2015-12-01 10:22:31 -08:00 |
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Howard Mao
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1db2da00f3
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Merge branch 'master' into rocc-fpu-port
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2015-11-30 19:18:58 -08:00 |
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Howard Mao
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e80340198a
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use implicit parameters for ALU
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2015-11-30 17:35:33 -08:00 |
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Colin Schmidt
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90991014a0
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Merge pull request #19 from ucb-bar/multirocc
Add support for multiple RoCC accelerators
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2015-11-28 08:56:04 -05:00 |
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Howard Mao
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9256239206
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implement support for multiple RoCC accelerators
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2015-11-26 12:46:01 -08:00 |
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Howard Mao
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58b0a86834
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some modifications to AccumulatorExample
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2015-11-26 08:48:19 -08:00 |
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Andrew Waterman
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e203b8b378
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Make ALU generic for zscale
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2015-11-24 19:17:07 -08:00 |
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Andrew Waterman
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5294e94794
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Remove CSR back pressure ability
We were using it for IPIs, but no longer need it.
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2015-11-24 18:28:14 -08:00 |
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Andrew Waterman
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4616db4695
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Make RegFile/ImmGen usable by zscale
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2015-11-24 18:27:07 -08:00 |
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Andrew Waterman
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6d1bf5c014
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Use generic LoadGen/StoreGen
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2015-11-24 18:13:33 -08:00 |
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Sagar Karandikar
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65632c875a
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Merge branch 'master' into rocc-fpu-port
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2015-11-21 02:24:38 -08:00 |
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Howard Mao
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b0a06a77db
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fix a few Chisel3 compat issues
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2015-11-20 13:33:15 -08:00 |
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Yunsup Lee
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94d2dd3053
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-11-16 23:29:25 -08:00 |
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Andrew Waterman
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0f092b9b59
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Remove IPI network
This is now provided via MMIO.
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2015-11-16 21:51:43 -08:00 |
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