riscv/rocket-chip
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31dd311affd4be2e00e83e6f22783081c331e2c6
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Christopher Celio 31dd311aff [fpu] fix rounding mode bug in fdivfsqrt
2016-02-08 17:38:31 -08:00
rocket
[fpu] fix rounding mode bug in fdivfsqrt
2016-02-08 17:38:31 -08:00
Description
Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
13 MiB
Languages
Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
Verilog 0.8%
Other 0.7%