riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Commit Graph

  • 8c13e78ab5 add buffering and locking to TL -> AXI converter Howard Mao 2016-07-06 16:54:58 -0700
  • e27cb5f885 fix voluntary release issue in L2 cache Howard Mao 2016-07-06 14:59:40 -0700
  • 9f7845f043 don't test BRAMSlave for now Howard Mao 2016-07-06 15:12:02 -0700
  • 5d8d5e598b add buffering and locking to TL -> Nasti converter Howard Mao 2016-07-06 16:51:45 -0700
  • 35a983275e Guarantee one-hotness of BTB entries Andrew Waterman 2016-07-06 15:54:33 -0700
  • bbf780725f add NastiReadIO and NastiWriteIO bundles Howard Mao 2016-07-06 15:13:04 -0700
  • b10d306b4a add option to log L2 cache transactions for easier debugging Howard Mao 2016-07-06 14:59:09 -0700
  • 64afc795fd make sure voluntary releases don't get allocated to L2WritebackUnit Howard Mao 2016-07-06 14:10:45 -0700
  • 2a146155fc Update to new priv-1.9 PTE format Andrew Waterman 2016-07-06 03:27:59 -0700
  • 8625f9ea0c Update PTE format Andrew Waterman 2016-07-06 03:20:41 -0700
  • c0e6ecebfc Fix BTB perf bug Andrew Waterman 2016-07-06 03:16:05 -0700
  • f3e22984d5 Remove uarch counters Andrew Waterman 2016-07-06 01:37:39 -0700
  • 25fdabdd59 Don't implicitly create Vecs, since they're heavyweight Andrew Waterman 2016-07-06 01:31:56 -0700
  • 8bd7e3932b Implement priv-1.9 PTE scheme Andrew Waterman 2016-07-05 19:19:49 -0700
  • f79a3285fb fix TraceGen and Nasti -> TL converter Howard Mao 2016-07-05 17:42:57 -0700
  • b105076996 fix ID mapper to disallow two in-flight requests with the same inner ID Howard Mao 2016-07-05 17:19:35 -0700
  • af76837970 conform to new NastiWriteDataChannel interface Howard Mao 2016-07-05 16:03:52 -0700
  • ee624b1c6e make NastiSmallTest a bit more intensive Howard Mao 2016-07-05 17:31:51 -0700
  • 96f09003f2 use options for NastiWriteDataChannel write mask Howard Mao 2016-07-05 16:03:25 -0700
  • 4c07aedfad Rewrite BRAMSlave to infer a single BRAM instance Albert Ou 2016-07-05 14:21:21 -0700
  • 8c5fd86f9b fix tracegen module and scripts Howard Mao 2016-07-05 13:50:17 -0700
  • c924ec2a22 fixing bufferless broadcast hub Howard Mao 2016-07-04 17:07:58 -0700
  • 702444709a make sure pending bits updated for all releases Howard Mao 2016-07-05 11:00:09 -0700
  • 06ed9c5794 add a single-entry queue in front of acquire and release for bufferless broadcast hub Howard Mao 2016-07-05 10:18:25 -0700
  • 67bac383e3 hopefully fixed last bugs in Bufferless Howard Mao 2016-07-04 17:00:27 -0700
  • a35388bc27 fix merging of same xact ID puts/gets Howard Mao 2016-07-04 17:00:03 -0700
  • 51f7bf1511 fix Bufferless voluntary release issue Howard Mao 2016-07-04 16:58:49 -0700
  • afc51c4a35 make sure TL -> NASTI converter handles multibeat transactions properly Howard Mao 2016-07-04 16:33:28 -0700
  • ebefe57036 simplify BTB fetchWidth=1 special case Andrew Waterman 2016-07-04 23:43:25 -0700
  • 61a44dcfc3 add regression test for L1 voluntary releases Howard Mao 2016-07-04 17:02:24 -0700
  • 85808f8cbb Clean up PseudoLRU code Andrew Waterman 2016-07-02 15:09:12 -0700
  • 2d325df60c Improve PTW simulation performance Andrew Waterman 2016-07-02 14:34:18 -0700
  • 5aa8ef1855 Remove invalidation support from BTB Andrew Waterman 2016-07-02 14:27:29 -0700
  • 663002ec0c Improve TLB simulation performance Andrew Waterman 2016-07-02 14:26:05 -0700
  • af51b6f363 bump groundtest and uncore Howard Mao 2016-07-01 18:13:46 -0700
  • b01871c3de test configurations for both shrinking and growing TL -> MIF Howard Mao 2016-07-01 18:13:33 -0700
  • 7f0a583515 timeout for Nasti tests Howard Mao 2016-07-01 18:11:44 -0700
  • caa9ca24b9 NASTI -> TL converter also uses ID mapper Howard Mao 2016-07-01 18:11:29 -0700
  • 37599fb0c9 fix use of width adapter in NastiConverterTest Howard Mao 2016-07-01 17:05:41 -0700
  • 39bee5198d Nasti Puts: decode wmask to determine addr_byte() and op_size() Wesley W. Terpstra 2016-06-29 18:39:46 -0700
  • e163a23583 fix another bug in Widener Howard Mao 2016-07-01 16:24:48 -0700
  • 10a46a36ae fix full_addr() function in TileLink Howard Mao 2016-07-01 15:17:41 -0700
  • e04e3d2571 make TestBench generator handle different top module names Howard Mao 2016-07-01 10:53:08 -0700
  • 61e3e5b45a more WIP on fixing Bufferless Howard Mao 2016-06-30 17:55:33 -0700
  • 0eedffa82f WIP: Fix BufferlessBroadcastHub Howard Mao 2016-06-29 16:02:31 -0700
  • 600f2da38a export TL interface for Mem/MMIO and fix TL width adapters Howard Mao 2016-06-30 18:20:43 -0700
  • ce46f523c9 make sure Widener uses proper parameters to generate acquire/grant Howard Mao 2016-06-30 18:17:16 -0700
  • f46efb671d add multi-transaction timer and add to Comparator Howard Mao 2016-06-30 17:39:10 -0700
  • a0b1772404 change TileLinkWidthAdapter interface Howard Mao 2016-06-30 15:50:23 -0700
  • e83b3d2472 turn up generator memory timeout Howard Mao 2016-06-29 10:57:31 -0700
  • 39ec927a3f replace complicated pattern substitutions with automatic variable Howard Mao 2016-06-28 18:30:11 -0700
  • a39a0c0ec4 .prm is output of chisel stage, not firrtl stage Howard Mao 2016-06-28 17:34:37 -0700
  • b30e0254ee fix Makefrag to detect all Chisel source files Howard Mao 2016-06-28 16:39:10 -0700
  • ebef4ddad0 remove mention of HTIF from README Howard Mao 2016-06-28 15:23:32 -0700
  • f1cbb2ff77 Turn up optimization for Verilator compilation Andrew Waterman 2016-06-28 14:01:37 -0700
  • 74cd588c65 refactor uncore to split into separate packages Howard Mao 2016-06-28 13:16:48 -0700
  • a9e0a5e2df changes to imports after uncore refactor Howard Mao 2016-06-28 13:15:39 -0700
  • 80670c08d7 changes to imports after uncore refactor Howard Mao 2016-06-28 13:15:56 -0700
  • 9feca99d5d make PutBlock wmask argument match Put Howard Mao 2016-06-28 13:09:20 -0700
  • b936aa9826 refactor uncore files into separate packages Howard Mao 2016-06-28 11:21:38 -0700
  • c10691b616 Don't take interrupts on instructions in branch shadow Andrew Waterman 2016-06-28 12:47:49 -0700
  • a70dee17ea Make RoCC energy-saving logic mirror same for D$ Andrew Waterman 2016-06-28 12:10:33 -0700
  • c725a78086 Merge RTC into PRCI Andrew Waterman 2016-06-27 23:08:29 -0700
  • 97e74aec3a Merge RTC and PRCI Andrew Waterman 2016-06-27 23:05:48 -0700
  • d10fc84a8b no longer require caching interfaces for groundtest tiles Howard Mao 2016-06-27 16:02:47 -0700
  • f438e7048c no longer need DummyCache since tiles no longer require cached interface Howard Mao 2016-06-27 16:32:06 -0700
  • ec5b9dfc86 make sure trackers can handle case where there are no caching clients Howard Mao 2016-06-27 16:29:51 -0700
  • 2dd8d90ae4 make Comparator fit the GroundTest model Howard Mao 2016-06-27 16:01:32 -0700
  • 7fea376f8c make comparator fit into GroundTest interface Howard Mao 2016-06-27 16:00:24 -0700
  • a93a70c8ec make sure merged voluntary releases are handled properly Howard Mao 2016-06-27 11:40:32 -0700
  • 3d63329b42 get rid of incorrect, broken, or useless configs in README Howard Mao 2016-06-24 15:37:56 -0700
  • 800e62412a use the fast version of asm/bmark-tests Howard Mao 2016-06-24 15:36:10 -0700
  • d6ba0437ff merge different configs into regression suites to reduce travis build times Howard Mao 2016-06-23 18:24:59 -0700
  • 87a4858aa6 Exit from testbench, not C code Andrew Waterman 2016-06-23 20:54:07 -0700
  • 4cd709c516 fix Comparator in groundtest Howard Mao 2016-06-23 15:47:24 -0700
  • 238ce99f5c fix requirement in Comparator Howard Mao 2016-06-23 15:47:09 -0700
  • 568bfa6c50 Purge legacy HTIF things Andrew Waterman 2016-06-23 13:23:57 -0700
  • 6fb07b1b79 Remove legacy HTIF things Andrew Waterman 2016-06-23 13:16:30 -0700
  • 6f85056494 Remove reliance on HtifKey Andrew Waterman 2016-06-23 13:18:42 -0700
  • 354b81c8fe Remove legacy HTIF things Andrew Waterman 2016-06-23 13:17:11 -0700
  • 2d44be747a Fix groundtest without HTIF Andrew Waterman 2016-06-23 12:17:26 -0700
  • 1844bac5bc Use stop() to exit cleanly Andrew Waterman 2016-06-23 12:16:37 -0700
  • 30331fcaeb Remove HTIF; use debug module for testing in simulation Andrew Waterman 2016-06-23 00:17:29 -0700
  • f57524e0c1 Remove FENCE.I from debug ROM; specialize for RV64 Andrew Waterman 2016-06-23 00:01:26 -0700
  • 6d43c0a945 Mask interrupts during single-step Andrew Waterman 2016-06-22 17:17:52 -0700
  • 5644a2703a Avoid need for FENCE.I in debug programs Andrew Waterman 2016-06-22 13:49:33 -0700
  • 7f88a00a38 Always verify BTB result; don't bother flushing it Andrew Waterman 2016-06-22 13:47:15 -0700
  • 255ef05e21 bump rocket Howard Mao 2016-06-22 17:59:05 -0700
  • 338f959620 get rid of commented out code Howard Mao 2016-06-22 17:36:53 -0700
  • 4fbe7d6cf7 split the isa tests properly Howard Mao 2016-06-22 16:14:02 -0700
  • 4c31248917 make sure UseAtomics is on when PTW is being used Howard Mao 2016-06-22 16:09:45 -0700
  • 5edb448a1f get rid of slow DualCoreConfig in Travis for now Howard Mao 2016-06-22 16:09:14 -0700
  • 3c973d429a rename SmallConfig to WithSmallCores Howard Mao 2016-06-22 16:08:27 -0700
  • 9b9ddd0d54 get rid of leftover backup memory code Howard Mao 2016-06-22 11:20:11 -0700
  • e3d3b2264a fix MuxCase and MuxLookup Howard Mao 2016-06-21 10:44:36 -0700
  • 0967f3cfed use MuxCase and MuxLookup instead of MuxBundle Howard Mao 2016-06-21 14:01:23 -0700
  • e3391b36b2 get rid of MuxBundle now that MuxCase and MuxLookup are fixed Howard Mao 2016-06-21 10:43:44 -0700
  • ff43238e6e give DualCoreConfig L2 cache to speed up test runs Howard Mao 2016-06-20 17:58:26 -0700
  • daa0f3038f invoke firrtl jar directly in order to control heap memory usage Howard Mao 2016-06-20 11:18:47 -0700
  • 82169e971e Dynamically compute number of L1 client channels Howard Mao 2016-06-13 16:24:01 -0700