Howard Mao
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4ff1aea288
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fix more Chisel3 deprecations
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2016-01-14 14:55:45 -08:00 |
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Henry Cook
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64aaf71b06
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L2AcquireTracker refactor to support merging Gets and Puts into Prefetches of the correct type.
Transaction metadata for primary and seconday misses now stored in the secondary miss queue.
Added BuiltInAcquireBuilder factory.
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2015-11-16 18:10:09 -08:00 |
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Howard Mao
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7942be4e01
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make sure outerTL method is idempotent
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2015-11-09 11:10:02 -08:00 |
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Henry Cook
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f8594da1d3
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depend on external cde library
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2015-10-21 18:17:17 -07:00 |
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Howard Mao
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02d113b39f
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outerDataBits / innerDataBits should be per beat, not per block
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2015-10-21 11:31:13 -07:00 |
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Henry Cook
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7fa3eb95e3
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refactor tilelink params
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2015-10-14 12:13:37 -07:00 |
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Henry Cook
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31be6407ec
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Removed all traces of params
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2015-10-14 00:23:28 -07:00 |
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Howard Mao
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24f3fac90a
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fix broadcast hub and TL -> NASTI converter to support subblock operations
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2015-09-14 12:56:44 -07:00 |
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Andrew Waterman
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05d311c517
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Use Vec.apply, not Vec.fill, for type nodes
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2015-08-27 09:47:02 -07:00 |
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Henry Cook
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005752e2a6
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use the parameters used to create the original object
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2015-08-10 14:43:17 -07:00 |
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Andrew Waterman
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2d6b3b2331
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Don't use clone
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2015-07-15 18:06:27 -07:00 |
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Andrew Waterman
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55059632c4
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Temporarily use HTIF to push RTC value to cores
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2015-07-05 16:19:39 -07:00 |
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Henry Cook
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172c372d3e
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L2 alloc cleanup
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2015-05-12 17:14:06 -07:00 |
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Henry Cook
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6d40a61060
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TileLink scala doc and parameter renaming
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2015-04-19 22:06:44 -07:00 |
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Henry Cook
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ba7a8b1752
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TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R).
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2015-04-17 16:55:20 -07:00 |
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Henry Cook
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ce3271aef2
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refactor LNClients and LNManagers
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2015-04-15 15:48:36 -07:00 |
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Henry Cook
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3cf1778c92
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moved ecc lib to uncore, l2 checks for partial write masks when ecc is enabled
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2015-04-06 12:22:23 -07:00 |
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Henry Cook
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9708d25dff
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Restructure L2 state machine and utilize HeaderlessTileLinkIO
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2015-04-06 12:19:51 -07:00 |
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Henry Cook
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004ad11af6
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cleanup pending signals
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2015-03-18 22:14:41 -07:00 |
|
Henry Cook
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1ff184bf62
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first cut at optimized state transitions
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2015-03-18 17:55:05 -07:00 |
|
Henry Cook
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638bace858
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avoid reading data when write mask is full
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2015-03-17 20:28:21 -07:00 |
|
Henry Cook
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b08dced37c
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first cut at pending scoreboarding
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2015-03-17 17:51:00 -07:00 |
|
Henry Cook
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8181262419
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clean up incoherent and probe flags
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2015-03-12 16:22:14 -07:00 |
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Henry Cook
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059575c334
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cleanup mergeData and prep for cleaner data_buffer in L2
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2015-03-11 15:43:41 -07:00 |
|
Henry Cook
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1bed6ea498
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New metadata-based coherence API
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2015-02-28 17:32:03 -08:00 |
|
Henry Cook
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0c66e70f14
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cleanup of conflicts; allocation bugfix
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2015-02-06 13:20:44 -08:00 |
|
Henry Cook
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6141b3efc5
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uncached -> builtin_type
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2015-02-02 01:02:06 -08:00 |
|
Henry Cook
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3aa030f960
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Support for uncached sub-block reads and writes, major TileLink and CoherencePolicy refactor.
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2015-02-01 20:37:16 -08:00 |
|
Henry Cook
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9ef00d187f
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%s/master/manager/g + better comments
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2014-12-29 22:55:58 -08:00 |
|
Henry Cook
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e62c71203e
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disconnect unused outer network headers
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2014-12-22 18:50:37 -08:00 |
|
Henry Cook
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d121af7f94
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Simplify release handling
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2014-12-18 17:12:29 -08:00 |
|
Henry Cook
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ab39cbb15d
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cleanup DirectoryRepresentation and coherence params
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2014-12-15 19:24:42 -08:00 |
|
Henry Cook
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424df2368f
|
1R/W L2 data array?
Add TLDataBeats to new LLC; all bmarks pass
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2014-12-12 17:05:21 -08:00 |
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Henry Cook
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3026c46a9c
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Finish adding TLDataBeats to uncore & hub
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2014-12-12 17:04:52 -08:00 |
|
Henry Cook
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cb7e712599
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Added uncached write data queue to coherence hub
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2014-11-12 12:55:07 -08:00 |
|
Henry Cook
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82155f333e
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Major tilelink revision for uncached message types
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2014-11-11 17:36:55 -08:00 |
|
Henry Cook
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10309849b7
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Remove master_xact_id from Probe and Release
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2014-11-06 12:07:33 -08:00 |
|
Henry Cook
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82fe22f958
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support for multiple tilelink paramerterizations in same design
Conflicts:
src/main/scala/cache.scala
|
2014-09-24 11:30:40 -07:00 |
|
Henry Cook
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149d51d644
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more coherence API cleanup
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2014-09-20 16:57:13 -07:00 |
|
Yunsup Lee
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0b51d70bd2
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add LICENSE
|
2014-09-12 15:31:38 -07:00 |
|
Henry Cook
|
9ab3a4262c
|
Cache utility traits. Completely compiles, asm tests hang.
|
2014-08-11 18:35:49 -07:00 |
|
Henry Cook
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f411fdcce3
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Full conversion to params. Compiles but does not elaborate.
|
2014-08-08 12:21:57 -07:00 |
|
Henry Cook
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3c329df7e7
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refactor Metadata, clean and expand coherence API
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2014-05-28 13:35:08 -07:00 |
|
Henry Cook
|
0237229921
|
client/master -> inner/outer
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2014-04-29 16:49:18 -07:00 |
|
Henry Cook
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52c6de5641
|
DRAMSideLLCLike trait. TSHRFile. New L2 config objects.
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2014-04-26 19:11:36 -07:00 |
|
Henry Cook
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1163131d1e
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TileLinkIO.GrantAck -> TileLinkIO.Finish
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2014-04-26 15:17:05 -07:00 |
|
Henry Cook
|
fbca7c6bb3
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refactor ioMem and associcated constants. merge Aqcuire and AcquireData
|
2014-04-10 12:35:43 -07:00 |
|
Andrew Waterman
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02dbd6b0aa
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Don't assign to your own inputs
|
2014-02-12 18:39:40 -08:00 |
|
Henry Cook
|
bbf8010230
|
cleanups supporting uncore hierarchy
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2014-01-31 15:59:21 -08:00 |
|
Henry Cook
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1cac26fd76
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NetworkIOs no longer use thunks
|
2013-09-10 16:15:41 -07:00 |
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