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Commit Graph

436 Commits

Author SHA1 Message Date
bac82762d3 use only one (wide) tag ram for set assoc. caches 2012-07-12 14:50:12 -07:00
429fcbed8e fix some LLC bugs 2012-07-11 17:56:39 -07:00
f645fb4dd7 add L2$
It still has performance bugs but no correctness bugs AFAIK.
2012-07-10 05:23:29 -07:00
5035374f36 update to new chisel 2012-07-08 17:59:41 -07:00
39d198ecdc fix htif handling of large memory reads 2012-06-26 19:12:11 -07:00
4e5f874266 update to new chisel/hwacha 2012-06-08 00:13:14 -07:00
a99cebb483 ioDecoupled -> FIFOIO, ioPipe -> PipeIO 2012-06-06 18:22:56 -07:00
04304fe788 moving util out into Chisel standard library 2012-06-06 12:51:26 -07:00
c975c21e44 views removed 2012-06-06 12:51:26 -07:00
943b6d0616 remove debug println 2012-06-06 02:48:48 -07:00
7f6319047e update to new scala/chisel/Mem 2012-06-06 02:47:22 -07:00
7408c9ab69 removing wires 2012-05-24 10:42:39 -07:00
181b20d69c working vec unit with pvfb 2012-05-24 10:38:14 -07:00
faee45bf4c fix setpcr/clearpcr not writing rd 2012-05-21 07:25:35 -07:00
c9602a0d2e fix vector control decode bug 2012-05-15 10:26:37 -07:00
d0bc995c88 Fixed IRQ_IPI -> IRQ_TIMER typo 2012-05-14 22:25:12 -07:00
a2f6d01c1b add programmable coreid register 2012-05-09 03:09:22 -07:00
e0e1cd5d32 add IPIs and an IPI test
IPIs are routed through the HTIF, which seems weird, but that makes it
so cores can bring each other out of reset with IPIs.
2012-05-08 22:58:00 -07:00
87cbae2c8a Removed defunct ioDmem 2012-05-07 17:31:39 -07:00
b851f1b34c support maximum-MTU HTIF packets 2012-05-03 21:11:43 -07:00
171c87002e reduce HTIF clock divider for now 2012-05-03 04:21:11 -07:00
e1f9dc2c1f generalize page table walker
also, don't instantiate vitlb when !HAVE_VEC
2012-05-03 02:29:09 -07:00
2d4e5d3813 fix pseudo-LRU verilog generation bug 2012-05-02 19:31:31 -07:00
622a801bb1 Refactored cpu/cache interface to use nested bundles 2012-05-02 11:54:28 -07:00
65ff397122 improved instruction decoding
it now makes use of don't-cares by performing logic minimization
2012-05-01 20:16:36 -07:00
4cfa6cd9a8 force Top.main's return type to Unit 2012-05-01 19:55:16 -07:00
5819beed64 use parameterized FP units 2012-05-01 01:25:43 -07:00
eafdffe125 simplify page table walker; speed up emulator 2012-05-01 01:24:36 -07:00
c13d3e6f88 fix probe tag read-modify-write atomicity violation 2012-04-26 02:29:31 -07:00
66f86a2194 use pseudo-LRU replacement for TLBs 2012-04-26 02:29:30 -07:00
a0378c5d2f remove faulting TLB entry after page fault
this vastly reduces the frequency with which the TLB must be flushed
2012-04-26 02:29:30 -07:00
6d8fc74378 fix DTLB permissions bug 2012-04-26 02:29:30 -07:00
1ed89f1cab Fixed abort bug: removed uneeded state, added mshr guard on xact_abort.valid and xact_init.ready on same cycle 2012-04-24 17:17:42 -07:00
55e86b5cf4 Fixed coherence bug: probe counting for single tile 2012-04-24 17:17:13 -07:00
a39080d0b1 Fixed abort bug: xact_abort.ready was not pinned high 2012-04-24 17:16:40 -07:00
fb4408b150 fix AMO replay/coherence deadlock 2012-04-15 22:56:02 -07:00
724735f13f fix writeback bug 2012-04-13 03:16:48 -07:00
00d934cfac fix coherence bugs in cache 2012-04-12 21:57:37 -07:00
fef58f1b3a Policy determined by constants. MSI policy added. 2012-04-11 17:56:59 -07:00
c0ec3794bf coherence mostly works now 2012-04-10 02:22:45 -07:00
3cdd166153 Refactored coherence as member rather than trait. MI and MEI protocols. 2012-04-10 00:09:58 -07:00
9c8f849f50 defined abstract coherence traits in base trait, added Incoherent trait, cleaned up incoherent policy 2012-04-09 23:29:32 -07:00
551e09c9d5 changed coherence type width names to represent max sizes for all protocols 2012-04-09 23:29:32 -07:00
0b4937f70f changed coherence message type names 2012-04-09 23:29:31 -07:00
ed79ec98f7 Refactored coherence better from uncore hub, better coherence function names 2012-04-09 23:29:31 -07:00
aee9378712 fix coherence bug with multiple probe replies 2012-04-09 21:40:35 -07:00
c9c3bd02bc kill mem stage if fpu nacks in mem stage 2012-04-01 17:02:32 -07:00
7f254d9670 refine FP bugfixes 2012-04-01 14:52:33 -07:00
c7c35322c2 two bug fixes to fpu 2012-03-31 22:23:51 -07:00
a09e8d1c55 remove I$ prefetcher for now
there's a bug in it, and I don't have time to fix it at the moment.
2012-03-27 15:43:56 -07:00