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64aaf71b06
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L2AcquireTracker refactor to support merging Gets and Puts into Prefetches of the correct type.
Transaction metadata for primary and seconday misses now stored in the secondary miss queue.
Added BuiltInAcquireBuilder factory.
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2015-11-16 18:10:09 -08:00 |
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03fa06e6e7
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fix prefetch lockup on L2 hit
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2015-11-15 12:51:34 -08:00 |
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e12efab423
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skip meta_write state if no meta write pending
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2015-11-13 13:50:35 -08:00 |
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7e7d688a01
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make sure L2 passes no-alloc acquires through to outer memory
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2015-11-12 15:40:58 -08:00 |
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b3865c370a
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make sure correct addr_beat is sent for Get response by narrower/converter
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2015-11-12 15:40:38 -08:00 |
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f397d61033
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add alloc option to Put constructor
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2015-11-12 11:39:59 -08:00 |
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7733fbe6a3
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make sure no-alloc write still updates data array if there is a cache hit
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2015-11-12 11:39:36 -08:00 |
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b59ce5fed4
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make sure L2 waits for outer grant before sending grant for write request
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2015-11-10 16:06:14 -08:00 |
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42d3d09d7a
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add a ClientTileLinkEnqueuer to complement the TileLinkEnqueuer
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2015-11-09 11:49:19 -08:00 |
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7942be4e01
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make sure outerTL method is idempotent
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2015-11-09 11:10:02 -08:00 |
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e3efc09b5b
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remove unnecessary UInt encode/decode on releaseMatches path
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2015-11-05 17:20:03 -08:00 |
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3698153535
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OHToUInt instead of PriorityEncoder on Acq/RelMatches signals in L2Bank
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2015-11-03 14:31:35 -08:00 |
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baa2544651
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Fix some more issues with narrower
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2015-10-31 19:36:30 -07:00 |
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812c5bcc55
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make sure narrower can handle sub-block level requests correctly
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2015-10-31 15:58:36 -07:00 |
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d4b8653002
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fix too strict assertion in broadcast hub
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2015-10-31 15:58:10 -07:00 |
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c10870a87c
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make sure ID width requirement in TL -> NASTI converter is correct
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2015-10-27 13:25:29 -07:00 |
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9fa4541916
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get rid of unused full signal in ReorderQueue
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2015-10-26 12:17:25 -07:00 |
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6403f27fbe
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fix bug in ReorderQueue breaking TileLink Unwrapper
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2015-10-22 15:52:55 -07:00 |
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4c2b0a9032
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Add ability to generate libraryDependency on cde.
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2015-10-22 09:57:02 -07:00 |
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f8594da1d3
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depend on external cde library
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2015-10-21 18:17:17 -07:00 |
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02d113b39f
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outerDataBits / innerDataBits should be per beat, not per block
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2015-10-21 11:31:13 -07:00 |
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baf95533a4
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fix combinational loop in TileLink Unwrapper
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2015-10-20 23:26:11 -07:00 |
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ffe7df2fed
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make sure TL -> NASTI converter acquire ready not dependent on valid
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2015-10-20 22:09:22 -07:00 |
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1c135c1628
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fix ready-valid mixup in TileLink unwrapper
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2015-10-20 21:07:42 -07:00 |
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4389b9edb0
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tilelink parameter tweak: addrBits now a constant
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2015-10-20 15:00:30 -07:00 |
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d12403e7dc
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fix up and simplify TL -> NASTI converter logic
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2015-10-19 13:47:13 -07:00 |
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d391f97953
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Minor refactor of StoreGen/AMOALU. Bugfix for 32b ops in L2's AMOALU.
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2015-10-16 19:11:06 -07:00 |
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e1f573918d
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simplify TileLinkParameters with Option
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2015-10-16 18:24:38 -07:00 |
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49667aa4b0
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make sure broadcast acquire tracker doesn't try to send requests back-to-back
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2015-10-14 18:56:13 -07:00 |
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1d362d6d3a
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make sure correct parameters are used for TileLink constructors
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2015-10-14 17:58:54 -07:00 |
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7fa3eb95e3
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refactor tilelink params
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2015-10-14 12:13:37 -07:00 |
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66ea39638e
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GlobalAddrMap
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2015-10-14 00:23:28 -07:00 |
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31be6407ec
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Removed all traces of params
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2015-10-14 00:23:28 -07:00 |
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908922c1a4
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refactor NASTI to not use param
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2015-10-14 00:23:28 -07:00 |
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47da284e56
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TileLinkNarrower should do nothing if interfaces are the same width
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2015-10-13 13:28:47 -07:00 |
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83df05cb6a
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add TileLink data narrower
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2015-10-13 12:45:39 -07:00 |
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993ed86198
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move ReorderQueue to utils.scala
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2015-10-13 09:49:22 -07:00 |
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0fe16ac1c0
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Chisel3 compatibility fixes
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2015-09-30 14:37:00 -07:00 |
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1e7f656527
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get release block address from inner release
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2015-09-28 15:02:51 -07:00 |
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3b1da4c57e
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Revert "replace remaining uses of Vec.fill"
This reverts commit b6bb4e42127d1ed42b55ec8b859a4e074b347d47.
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2015-09-25 17:06:57 -07:00 |
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20b7a82ab6
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Use Vec.fill, not Vec.apply, when making Vec literals
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2015-09-25 17:06:52 -07:00 |
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2179cb64ae
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Let isRead be true for store-conditional
This works around a deadlock bug in the L1 D$, and is arguably true.
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2015-09-25 15:28:02 -07:00 |
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308022210a
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use updated NASTI channel constructors
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2015-09-25 12:07:27 -07:00 |
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8c4ac0f4f3
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make sure CSR/SCR data width matches xLen
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2015-09-25 12:07:03 -07:00 |
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d1f2d40a90
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replace remaining uses of Vec.fill
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2015-09-24 17:50:09 -07:00 |
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3ff830e118
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ReorderQueue uses Vec of Bools instead of Bits for roq_free
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2015-09-24 17:43:53 -07:00 |
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83740dfaa5
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Merge branch 'master' of github.com:ucb-bar/uncore
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2015-09-24 17:10:09 -07:00 |
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3b86790c3f
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replace NASTIMasterIO and NASTISlaveIO with NASTIIO
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2015-09-24 16:58:20 -07:00 |
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ee6754daca
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Fix clone -> cloneType
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2015-09-24 16:18:25 -07:00 |
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b4d21148ec
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get rid of NASTI error assertion
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2015-09-22 09:43:42 -07:00 |
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