Andrew Waterman
|
54cbf0c4f1
|
Add (unused) RV32 CSRs
|
2014-03-15 17:33:17 -07:00 |
|
Andrew Waterman
|
943d7ac80a
|
Use LinkedHashSet/Map for simpler determinism
|
2014-03-15 17:31:48 -07:00 |
|
Donggyu Kim
|
53d62cb69d
|
remove nondeterminism
|
2014-03-15 16:45:58 -07:00 |
|
Andrew Waterman
|
a0389645b7
|
New FP encoding; improved FP implementation
|
2014-03-11 18:58:24 -07:00 |
|
Andrew Waterman
|
00bc1a2293
|
Add fclass.{s|d} instructions
|
2014-03-10 16:59:24 -07:00 |
|
Yunsup Lee
|
ac4b3f9f22
|
print out core id
|
2014-03-04 23:38:49 -08:00 |
|
Andrew Waterman
|
9f2e16c58a
|
Fix D$ arbiter for >2 inputs
|
2014-03-04 16:32:17 -08:00 |
|
Andrew Waterman
|
fa75f6e81e
|
Fix null pointer exception when HAS_FPU=false
|
2014-03-04 16:32:09 -08:00 |
|
Andrew Waterman
|
c7110c8389
|
Make FPU pipeline depths configurable
|
2014-02-28 13:39:59 -08:00 |
|
Yunsup Lee
|
98b830201a
|
add wen signal to dasm printf
|
2014-02-25 03:31:06 -08:00 |
|
Yunsup Lee
|
97b1841fcf
|
change dcache tag bits to 7
|
2014-02-22 22:53:04 -08:00 |
|
Andrew Waterman
|
8e3ca609f7
|
Renumber uarch CSRs into custom CSR space
|
2014-02-14 17:40:00 -08:00 |
|
Andrew Waterman
|
a09ff9fdc7
|
Revert to old AUIPC definition
|
2014-02-10 19:04:42 -08:00 |
|
Andrew Waterman
|
1456170c6d
|
Always stall decode on RoCC -> FENCE; never stall on RoCC -> deferred AMO.RL fence
|
2014-02-06 12:01:49 -08:00 |
|
Andrew Waterman
|
eca8c99f44
|
Ignore rocc interrupt line when no rocc is present
|
2014-02-06 03:06:55 -08:00 |
|
Andrew Waterman
|
e7a726fbac
|
Make uarch counters read-only
|
2014-02-06 01:48:56 -08:00 |
|
Quan Nguyen
|
f021213b1d
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Merge remote-tracking branch 'origin/master' into hwacha-port
|
2014-02-06 00:21:28 -08:00 |
|
Andrew Waterman
|
62e9313aef
|
Add 16 microarchitectural counters
|
2014-02-06 00:13:02 -08:00 |
|
Yunsup Lee
|
ff7cae29f7
|
hookup rocc interrupt and s bit
|
2014-02-06 00:09:42 -08:00 |
|
Yunsup Lee
|
ab4a3e937b
|
don't share fma pipes
|
2014-02-05 14:21:43 -08:00 |
|
Stephen Twigg
|
6a02d15c21
|
Merge branch 'master' into hwacha-port
|
2014-02-04 17:05:03 -08:00 |
|
Henry Cook
|
2c2b3a7678
|
cleanups supporting uncore hierarchy
|
2014-01-31 12:07:26 -08:00 |
|
Andrew Waterman
|
febd26f505
|
Correct CSR privilege logic
|
2014-01-31 01:03:17 -08:00 |
|
Stephen Twigg
|
3c3c469725
|
Add exception signal to rocc interface
|
2014-01-28 22:13:16 -08:00 |
|
Andrew Waterman
|
0266c1f76a
|
Support retirement width > 1 in CSR file
|
2014-01-24 16:37:40 -08:00 |
|
Andrew Waterman
|
267394d3cc
|
Fix CSR interlocks
|
2014-01-24 16:37:40 -08:00 |
|
Andrew Waterman
|
1f986d1c96
|
Branches don't care about the ALU input/function
|
2014-01-24 16:37:40 -08:00 |
|
Andrew Waterman
|
a1b7774f5d
|
Simplify handling of CAUSE register
|
2014-01-24 16:37:39 -08:00 |
|
Christopher Celio
|
a2be21361e
|
Allow ICacheConfig to toggle fetch-width.
|
2014-01-22 16:19:57 -08:00 |
|
Andrew Waterman
|
a7489920ce
|
Support CSR atomics on all CSRs, not just STATUS
|
2014-01-21 16:17:39 -08:00 |
|
Andrew Waterman
|
6ba2c1abe5
|
Use auto-generated CAUSE constants
|
2014-01-21 15:01:54 -08:00 |
|
Andrew Waterman
|
95de358a96
|
More of the same FPU fix
some SP ops followed by DP stores were not working because they
were encoded as subnormals, not NaNs.
|
2014-01-17 14:09:30 -08:00 |
|
Andrew Waterman
|
cf38001e98
|
Fix fmv.s.x -> fsd
|
2014-01-17 03:52:35 -08:00 |
|
Yunsup Lee
|
30b894c2c4
|
Merge remote-tracking branch 'origin/master' into hwacha-port
|
2014-01-16 16:04:48 -08:00 |
|
Yunsup Lee
|
6bbbf36979
|
push accel/rocket dmem port back to rocket
|
2014-01-16 16:01:41 -08:00 |
|
Andrew Waterman
|
57f4d89c90
|
Generate D$ replay_next signals correctly
|
2014-01-16 00:16:09 -08:00 |
|
Andrew Waterman
|
6ebdc4d94e
|
Simplify store conditional failure code generation
|
2014-01-16 00:15:48 -08:00 |
|
Andrew Waterman
|
31060ea8ae
|
Fix fubar long-latency writeback control logic
Load miss writebacks happening at the same time as multiplication
wasn't working. Hopefully this does it.
|
2014-01-14 04:02:43 -08:00 |
|
Andrew Waterman
|
e8486817e6
|
Clean up formatting (i.e. remove tabs, semicolons)
|
2014-01-13 21:43:56 -08:00 |
|
Andrew Waterman
|
a50a1f7d50
|
Clean up multiplier/divider stuff
|
2014-01-13 21:37:16 -08:00 |
|
Andrew Waterman
|
4d236979bd
|
Fix very far forward JALs
We were sign-extending from the wrong bit, causing a backwards jump.
|
2014-01-13 00:55:48 -08:00 |
|
Andrew Waterman
|
c546f66404
|
Swap JAL/JALR encodings (again)
|
2014-01-13 00:54:49 -08:00 |
|
Quan Nguyen
|
ebec444ad2
|
Increase tag width for configurable precision in Hwacha
|
2013-12-13 03:33:02 -08:00 |
|
Andrew Waterman
|
07a91bb99a
|
Miscellaneous cleanup
|
2013-12-09 19:53:14 -08:00 |
|
Andrew Waterman
|
da3135ac9b
|
Begin integer unit clean-up
...to make it easier to generate the superscalar version of the core.
|
2013-12-09 15:06:13 -08:00 |
|
Andrew Waterman
|
16d5250924
|
Correct FP trap behavior on FCSR
|
2013-12-05 04:18:04 -08:00 |
|
Andrew Waterman
|
5814a90472
|
Make DecodeLogic interface more flexible
|
2013-12-05 04:16:48 -08:00 |
|
Andrew Waterman
|
924261e2b2
|
Update to new privileged ISA... phew
|
2013-11-25 04:35:15 -08:00 |
|
Andrew Waterman
|
65b8340cea
|
Mitigate D$ hit -> branch -> NPC critical path
|
2013-11-24 14:21:03 -08:00 |
|
Andrew Waterman
|
53f726008b
|
Use Mem instead of Vec[Reg] for TLB
QoR-neutral, improves simulation speed
|
2013-11-24 14:21:02 -08:00 |
|