Howard Mao
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1c135c1628
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fix ready-valid mixup in TileLink unwrapper
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2015-10-20 21:07:42 -07:00 |
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Henry Cook
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4389b9edb0
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tilelink parameter tweak: addrBits now a constant
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2015-10-20 15:00:30 -07:00 |
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Howard Mao
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d12403e7dc
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fix up and simplify TL -> NASTI converter logic
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2015-10-19 13:47:13 -07:00 |
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Henry Cook
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d391f97953
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Minor refactor of StoreGen/AMOALU. Bugfix for 32b ops in L2's AMOALU.
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2015-10-16 19:11:06 -07:00 |
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Henry Cook
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e1f573918d
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simplify TileLinkParameters with Option
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2015-10-16 18:24:38 -07:00 |
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Howard Mao
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49667aa4b0
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make sure broadcast acquire tracker doesn't try to send requests back-to-back
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2015-10-14 18:56:13 -07:00 |
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Howard Mao
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1d362d6d3a
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make sure correct parameters are used for TileLink constructors
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2015-10-14 17:58:54 -07:00 |
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Henry Cook
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7fa3eb95e3
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refactor tilelink params
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2015-10-14 12:13:37 -07:00 |
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Henry Cook
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66ea39638e
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GlobalAddrMap
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2015-10-14 00:23:28 -07:00 |
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Henry Cook
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31be6407ec
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Removed all traces of params
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2015-10-14 00:23:28 -07:00 |
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Henry Cook
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908922c1a4
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refactor NASTI to not use param
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2015-10-14 00:23:28 -07:00 |
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Howard Mao
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47da284e56
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TileLinkNarrower should do nothing if interfaces are the same width
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2015-10-13 13:28:47 -07:00 |
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Howard Mao
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83df05cb6a
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add TileLink data narrower
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2015-10-13 12:45:39 -07:00 |
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Howard Mao
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993ed86198
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move ReorderQueue to utils.scala
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2015-10-13 09:49:22 -07:00 |
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Andrew Waterman
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0fe16ac1c0
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Chisel3 compatibility fixes
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2015-09-30 14:37:00 -07:00 |
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Howard Mao
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1e7f656527
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get release block address from inner release
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2015-09-28 15:02:51 -07:00 |
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Andrew Waterman
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3b1da4c57e
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Revert "replace remaining uses of Vec.fill"
This reverts commit b6bb4e42127d1ed42b55ec8b859a4e074b347d47.
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2015-09-25 17:06:57 -07:00 |
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Andrew Waterman
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20b7a82ab6
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Use Vec.fill, not Vec.apply, when making Vec literals
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2015-09-25 17:06:52 -07:00 |
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Andrew Waterman
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2179cb64ae
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Let isRead be true for store-conditional
This works around a deadlock bug in the L1 D$, and is arguably true.
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2015-09-25 15:28:02 -07:00 |
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Howard Mao
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308022210a
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use updated NASTI channel constructors
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2015-09-25 12:07:27 -07:00 |
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Howard Mao
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8c4ac0f4f3
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make sure CSR/SCR data width matches xLen
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2015-09-25 12:07:03 -07:00 |
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Howard Mao
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d1f2d40a90
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replace remaining uses of Vec.fill
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2015-09-24 17:50:09 -07:00 |
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Howard Mao
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3ff830e118
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ReorderQueue uses Vec of Bools instead of Bits for roq_free
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2015-09-24 17:43:53 -07:00 |
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Howard Mao
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83740dfaa5
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Merge branch 'master' of github.com:ucb-bar/uncore
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2015-09-24 17:10:09 -07:00 |
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Howard Mao
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3b86790c3f
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replace NASTIMasterIO and NASTISlaveIO with NASTIIO
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2015-09-24 16:58:20 -07:00 |
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ducky
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ee6754daca
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Fix clone -> cloneType
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2015-09-24 16:18:25 -07:00 |
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Howard Mao
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b4d21148ec
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get rid of NASTI error assertion
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2015-09-22 09:43:42 -07:00 |
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Howard Mao
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8b2341b1b1
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use reorder queue instead of extra tag bit to determine TL g_type in NASTI -> TL converter
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2015-09-18 09:41:37 -07:00 |
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Howard Mao
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bd536d8832
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make HTIFModuleIO an anonymous bundle
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2015-09-14 12:58:44 -07:00 |
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Howard Mao
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9d89d2a558
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get rid of MemIO -> TileLink converters
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2015-09-14 12:58:44 -07:00 |
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Howard Mao
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f9965648f2
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fix up some things in tilelink.scala
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2015-09-14 12:57:54 -07:00 |
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Howard Mao
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64717706a9
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get rid of non-NASTI RTC module
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2015-09-14 12:57:54 -07:00 |
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Howard Mao
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6ee6ea4f1e
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use Put/Get/PutBlock/GetBlock constructors in broadcast hub
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2015-09-14 12:57:54 -07:00 |
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Howard Mao
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ae3d96013a
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make TL -> NASTI converter ingest ClientUncachedTileLinkIO and move functionality to Unwrapper
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2015-09-14 12:57:54 -07:00 |
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Howard Mao
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21f96f382c
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split off SCR functionality from HTIF
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2015-09-14 12:57:54 -07:00 |
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Howard Mao
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bdc6972a8d
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separate RTC updates from HTIF
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2015-09-14 12:56:44 -07:00 |
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Howard Mao
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24f3fac90a
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fix broadcast hub and TL -> NASTI converter to support subblock operations
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2015-09-14 12:56:44 -07:00 |
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Andrew Waterman
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24389a5257
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Chisel3 compatibility fixes
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2015-09-11 15:41:39 -07:00 |
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Andrew Waterman
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350d530766
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Use Vec.fill, not Vec.apply, for Vec literals
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2015-08-27 10:00:43 -07:00 |
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Andrew Waterman
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94287fed90
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Avoid type-unsafe assignments
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2015-08-27 09:57:36 -07:00 |
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Andrew Waterman
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05d311c517
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Use Vec.apply, not Vec.fill, for type nodes
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2015-08-27 09:47:02 -07:00 |
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Henry Cook
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005752e2a6
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use the parameters used to create the original object
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2015-08-10 14:43:17 -07:00 |
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Andrew Waterman
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01fc61ba96
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Don't construct so many Vecs
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2015-08-05 18:43:59 -07:00 |
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Howard Mao
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a551a12d70
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add missing Wire wrap in BasicCrossbar
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2015-08-05 17:05:31 -07:00 |
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Andrew Waterman
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eb6583d607
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use cloneType in PhysicalNetworkIO
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2015-08-05 16:47:49 -07:00 |
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Andrew Waterman
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798ddeb5f5
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Chisel3 compatibility: use >>Int instead of >>UInt
The latter doesn't contract widths anymore.
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2015-08-04 13:15:17 -07:00 |
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Andrew Waterman
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fb718f03c1
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bump scala to 2.11.6
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2015-08-03 19:50:58 -07:00 |
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Andrew Waterman
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77cf26aeba
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Chisel3: Flip order of := and <>
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2015-08-03 18:53:39 -07:00 |
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Andrew Waterman
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121e4fb511
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Flip direction of some bulk connects
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2015-08-03 18:01:14 -07:00 |
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Andrew Waterman
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a21979a2fa
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Bits -> UInt
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2015-08-03 18:01:06 -07:00 |
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