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Commit Graph

3701 Commits

Author SHA1 Message Date
Amirali Sharifian
879a4a0bcd Update Makefile
Change default shell to bash shell.
2015-04-06 15:05:43 -07:00
Colin Schmidt
887a8de189 Merge branch 'master' of github.com:ucb-bar/rocket into rocc-fpu-port 2015-04-06 13:48:44 -07:00
Henry Cook
3cf1778c92 moved ecc lib to uncore, l2 checks for partial write masks when ecc is enabled 2015-04-06 12:22:23 -07:00
Henry Cook
9708d25dff Restructure L2 state machine and utilize HeaderlessTileLinkIO 2015-04-06 12:19:51 -07:00
Andrew Waterman
9ade0e41cc Integrate divide/sqrt unit 2015-04-04 16:39:17 -07:00
Andrew Waterman
fe27b9b1b2 Support writing sstatus.fs even without an FPU 2015-04-04 15:20:18 -07:00
Andrew Waterman
bce62d5774 Update PTE format to reflect reserved bits 2015-04-04 15:19:15 -07:00
Colin Schmidt
a369d8f17f Add fpu port to the rocc interface 2015-04-02 01:30:11 -07:00
Henry Cook
ced627f00a slight mod to pending_puts
cleaner state transition logic
2015-04-01 15:24:53 -07:00
Andrew Waterman
c941f0a68e New virtual memory implementation (Sv39) 2015-03-27 16:21:29 -07:00
Andrew Waterman
d912ea265e New virtual memory implementation (Sv39) 2015-03-27 16:20:59 -07:00
Henry Cook
8959b2e81a TileLinkEnqueuer 2015-03-26 13:29:52 -07:00
Henry Cook
b7af610569 broadcast hub bugfix 2015-03-26 11:29:04 -07:00
Henry Cook
4176edaa34 clean up tracker allocation 2015-03-26 10:17:51 -07:00
Andrew Waterman
faada5f110 Mask off LSBs of sepc/mepc/stvec
Therefore, they cannot generate misaligned instruction exceptions.
When a misaligned instruction exception does occur, mbadaddr
retains the misaligned PC bits, so no information is actually lost.
2015-03-25 00:20:58 -07:00
Andrew Waterman
543ac91cf2 Misaligned fetches can't happen at the I$ anymore
They are caught before the I$ ever sees them, so leverage that fact.
2015-03-24 23:55:43 -07:00
Andrew Waterman
90b31586ff Misc. CSR fixes/improvements
- Support RV32 mstatus register
- Don't ignore mstatus.stie bit
- Support custom M-mode R/W CSRs for Raven chip
2015-03-24 23:50:18 -07:00
Andrew Waterman
822698b567 support disabling supervisor mode (via UseVM parameter) 2015-03-24 19:32:45 -07:00
Andrew Waterman
0332c1e7fe Reduce latency of page table walks
A small cache in the PTW caches non-leaf PTEs, reducing latency and D$ misses.
2015-03-24 18:58:38 -07:00
Andrew Waterman
31d17cbf86 Hard-wire LSB of JALR to 0, as sent to BTB 2015-03-21 00:16:34 -07:00
Henry Cook
db5511300d Merge branch 'l2-subblock-merging' 2015-03-18 23:52:06 -07:00
Henry Cook
3cf033180f pending read fix 2015-03-18 22:41:09 -07:00
Henry Cook
004ad11af6 cleanup pending signals 2015-03-18 22:14:41 -07:00
Henry Cook
002851f836 disentangle is_hit logic 2015-03-18 21:11:40 -07:00
Henry Cook
b92ea60891 you can 'hit' with putblocks even when the tag doesn't match but you still better writeback 2015-03-18 19:32:46 -07:00
Henry Cook
fb8071c12d generous hit detection on PutBlocks 2015-03-18 18:49:32 -07:00
Henry Cook
19059bf0eb put data can be used for ignts 2015-03-18 18:28:03 -07:00
Henry Cook
1ff184bf62 first cut at optimized state transitions 2015-03-18 17:55:05 -07:00
Henry Cook
e325399c87 Re-split mem resp tag and data queues 2015-03-18 12:49:53 -07:00
Henry Cook
42aa4aa8ca Secondary miss param 2015-03-17 22:53:50 -07:00
Henry Cook
b364d387de Merge branch 'l2-subblock-merging' of github.com:ucb-bar/uncore into l2-subblock-merging 2015-03-17 22:46:54 -07:00
Henry Cook
825c4b2850 make ignts more eager 2015-03-17 22:44:53 -07:00
Yunsup Lee
aa5435800d fix get merging, and always turn it on 2015-03-17 22:43:00 -07:00
Yunsup Lee
53617d6df5 fix long-standing dcache bug
have to initialize register, if it is used the same cycle it is begin written
2015-03-17 21:45:17 -07:00
Yunsup Lee
f4f59464df fix pending_puts initialization 2015-03-17 21:44:26 -07:00
Henry Cook
0e4cf74d8a always merge Puts 2015-03-17 20:53:27 -07:00
Henry Cook
d48775eecb cleanup outdated comments 2015-03-17 20:31:23 -07:00
Henry Cook
638bace858 avoid reading data when write mask is full 2015-03-17 20:28:21 -07:00
Henry Cook
b9591b297c added s_wait_puts to L2AcquireTracker 2015-03-17 20:28:21 -07:00
Henry Cook
2d3f947a9c cleaned up finish counter 2015-03-17 20:28:21 -07:00
Yunsup Lee
9de5161d7a guard all writes to data ram with masks 2015-03-17 20:24:04 -07:00
Yunsup Lee
d14efce0b4 fix wmask_buffer initialization 2015-03-17 19:54:11 -07:00
Yunsup Lee
2d7375760d set pending_writes for puts 2015-03-17 18:35:04 -07:00
Yunsup Lee
504eedbf89 fixes in in bit manipulation 2015-03-17 18:07:52 -07:00
Henry Cook
b08dced37c first cut at pending scoreboarding 2015-03-17 17:51:00 -07:00
Yunsup Lee
4fd01d82b8 don't block finish messages when grant'ing 2015-03-17 17:48:02 -07:00
Yunsup Lee
a52a729ab9 bugfix wmask handling 2015-03-17 15:54:21 -07:00
Henry Cook
fc0ae81a97 added finish counter 2015-03-17 15:04:30 -07:00
Henry Cook
d774afaf73 Merge branch 'l2-subblock-merging' of github.com:ucb-bar/uncore into l2-subblock-merging 2015-03-17 13:10:42 -07:00
Henry Cook
5c2461c743 merge data wmask bugfix 2015-03-17 13:09:47 -07:00