Secondary miss param
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@ -10,6 +10,8 @@ case object RowBits extends Field[Int]
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case object Replacer extends Field[() => ReplacementPolicy]
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case object AmoAluOperandBits extends Field[Int]
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case object L2DirectoryRepresentation extends Field[DirectoryRepresentation]
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case object NPrimaryMisses extends Field[Int]
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case object NSecondaryMisses extends Field[Int]
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case object CacheBlockBytes extends Field[Int]
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case object CacheBlockOffsetBits extends Field[Int]
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@ -171,7 +173,7 @@ abstract trait L2HellaCacheParameters extends CacheParameters with CoherenceAgen
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val amoAluOperandBits = params(AmoAluOperandBits)
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require(amoAluOperandBits <= innerDataBits)
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require(rowBits == innerDataBits) // TODO: relax this by improving s_data_* states
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val nSecondaryMisses = 4
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val nSecondaryMisses = params(NSecondaryMisses)
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}
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abstract class L2HellaCacheBundle extends Bundle with L2HellaCacheParameters
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