riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

Update PTE format to reflect reserved bits

Browse Source
This commit is contained in:
Andrew Waterman 2015-04-04 15:19:15 -07:00
parent d912ea265e
commit bce62d5774
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
rocket/src/main/scala/ptw.scala
View File

@ -33,7 +33,8 @@ class DatapathPTWIO extends CoreBundle {
class PTE extends CoreBundle {
val ppn = Bits(width = ppnBits)
val reserved = Bits(width = 2)
val reserved = Bits(width = 16)
val reserved_for_software = Bits(width = 2)
val d = Bool()
val r = Bool()
val g = Bool()