riscv/rocket-chip
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Support writing sstatus.fs even without an FPU

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This commit is contained in:
Andrew Waterman 2015-04-04 15:20:18 -07:00
parent bce62d5774
commit fe27b9b1b2
1 changed files with 1 additions and 1 deletions
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rocket/src/main/scala/csr.scala
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@ -377,7 +377,7 @@ class CSRFile extends CoreModule
reg_mstatus.ie := new_sstatus.ie
reg_mstatus.ie1 := new_sstatus.pie
reg_mstatus.prv1 := Mux(new_sstatus.ps, PRV_S, PRV_U)
if (!params(BuildFPU).isEmpty) reg_mstatus.fs := new_sstatus.fs
reg_mstatus.fs := new_sstatus.fs // even without an FPU
if (!params(BuildRoCC).isEmpty) reg_mstatus.xs := new_sstatus.xs
}
when (decoded_addr(CSRs.sscratch)) { reg_sscratch := wdata }