 klemens
|
700e6b640d
|
Document address extraction for the mig
|
2018-05-13 19:52:38 +02:00 |
|
|
klemens
|
12cb1c2fa5
|
Implement XilinxML507MIGToTL TL to MIG converter
|
2018-05-10 21:40:52 +02:00 |
|
|
klemens
|
7e53be49f9
|
Fix memory controller signal name
|
2018-05-10 02:27:31 +02:00 |
|
|
klemens
|
77694a6741
|
Add clock generation for the mig
|
2018-05-10 01:04:52 +02:00 |
|
|
klemens
|
589e9960c0
|
Move XilinxML507MIGToTL and MIG into a separate clock domain
|
2018-05-10 00:30:23 +02:00 |
|
|
klemens
|
2707fa59a4
|
Add XilinxML507MIG periphery and connect top level signals
|
2018-05-10 00:29:22 +02:00 |
|
|
klemens
|
3797385a8c
|
Import ml507 mig TL implementation stub
|
2018-05-09 23:17:08 +02:00 |
|
|
klemens
|
79b53cf2ae
|
Add dip switches and clean up top interface
|
2018-05-01 00:07:58 +02:00 |
|
|
klemens
|
5bcc4e82fd
|
Generate separate processor and terminal clocks
|
2018-04-30 22:52:02 +02:00 |
|
|
klemens
|
9c06418352
|
Add terminal/dvi io (unsing the same clock for now)
|
2018-04-30 00:41:05 +02:00 |
|
|
klemens
|
b2b19cc822
|
Add clock and proper reset feedback to ml507
|
2018-04-19 01:29:15 +02:00 |
|
|
klemens
|
5db71d11c2
|
Fix polarity of buttons and dips on the ml507
|
2018-04-19 01:28:36 +02:00 |
|
|
klemens
|
f4ae1d469f
|
Remove unused signals (pcie, mem) from ml507 shell
|
2018-04-19 01:27:35 +02:00 |
|
|
klemens
|
0b421d5645
|
Remove incorrect jtag pin constraints form ml507
|
2018-04-19 01:26:15 +02:00 |
|
|
klemens
|
8329b232e2
|
Hold ml507 in reset while clock not locked
|
2018-04-19 01:25:31 +02:00 |
|
|
klemens
|
2ff28e6af6
|
Add status indication led for the reset button
|
2018-04-18 00:26:43 +02:00 |
|
|
klemens
|
41362a1cb5
|
Remove unused UART signals (rs and cs) from ml507
|
2018-04-18 00:26:00 +02:00 |
|
|
klemens
|
e9625bf8ee
|
Add initial ML507Shell stub based on VC707Shell
|
2018-04-12 00:42:46 +02:00 |
|