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Hold ml507 in reset while clock not locked

This commit is contained in:
Klemens Schölhorn 2018-04-19 01:25:31 +02:00
parent 2ff28e6af6
commit 8329b232e2
2 changed files with 4 additions and 1 deletions

View File

@ -99,6 +99,7 @@ class ml507_sys_clock extends BlackBox {
val io = new Bundle {
val CLKIN_IN = Bool(INPUT)
val CLKFX_OUT = Clock(OUTPUT)
val LOCKED_OUT = Bool(OUTPUT)
}
}

View File

@ -163,6 +163,7 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
val pcie_dat_clock = Wire(Clock())
val pcie_cfg_clock = Wire(Clock())
val mmcm_lock_pcie = Wire(Bool())
val clk_locked = Wire(Bool())
//-----------------------------------------------------------------------
@ -186,6 +187,7 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
val ml507_sys_clock = Module(new ml507_sys_clock)
ml507_sys_clock.io.CLKIN_IN := sys_clock.asUInt
val clk50 = ml507_sys_clock.io.CLKFX_OUT
clk_locked := ml507_sys_clock.io.LOCKED_OUT
// DUT clock
dut_clock := clk50
@ -194,7 +196,7 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
// System reset
//-----------------------------------------------------------------------
do_reset := !mig_mmcm_locked || !mmcm_lock_pcie || mig_sys_reset
do_reset := !clk_locked || sys_reset
mig_resetn := !mig_reset
dut_resetn := !dut_reset
pcie_dat_resetn := !pcie_dat_reset