Hold ml507 in reset while clock not locked
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2ff28e6af6
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@ -99,6 +99,7 @@ class ml507_sys_clock extends BlackBox {
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val io = new Bundle {
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val CLKIN_IN = Bool(INPUT)
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val CLKFX_OUT = Clock(OUTPUT)
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val LOCKED_OUT = Bool(OUTPUT)
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}
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}
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@ -163,6 +163,7 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
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val pcie_dat_clock = Wire(Clock())
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val pcie_cfg_clock = Wire(Clock())
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val mmcm_lock_pcie = Wire(Bool())
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val clk_locked = Wire(Bool())
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//-----------------------------------------------------------------------
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@ -186,6 +187,7 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
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val ml507_sys_clock = Module(new ml507_sys_clock)
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ml507_sys_clock.io.CLKIN_IN := sys_clock.asUInt
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val clk50 = ml507_sys_clock.io.CLKFX_OUT
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clk_locked := ml507_sys_clock.io.LOCKED_OUT
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// DUT clock
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dut_clock := clk50
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@ -194,7 +196,7 @@ abstract class ML507Shell(implicit val p: Parameters) extends RawModule {
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// System reset
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//-----------------------------------------------------------------------
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do_reset := !mig_mmcm_locked || !mmcm_lock_pcie || mig_sys_reset
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do_reset := !clk_locked || sys_reset
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mig_resetn := !mig_reset
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dut_resetn := !dut_reset
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pcie_dat_resetn := !pcie_dat_reset
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