This website requires JavaScript.
Explore
Help
Sign In
riscv
/
fpga-shells
Watch
1
Star
0
Fork
0
You've already forked fpga-shells
Code
Releases
Activity
53
Commits
2
Branches
0
Tags
f4ae1d469f67c830539ceaa97c26448106caafbd
Go to file
Code
Clone
HTTPS
Tea CLI
Open with VS Code
Open with VSCodium
Open with Intellij IDEA
Download ZIP
Download TAR.GZ
Download BUNDLE
Klemens Schölhorn
f4ae1d469f
Remove unused signals (pcie, mem) from ml507 shell
2018-04-19 01:27:35 +02:00
src/main
/scala
Remove unused signals (pcie, mem) from ml507 shell
2018-04-19 01:27:35 +02:00
xilinx
prologue: support the absence of an xdc/tcl constraint file
2018-02-25 15:21:03 -08:00
.gitignore
Initial commit for fpga-shells
2017-08-16 11:23:45 -07:00
Description
Freedom FPGA mappings (
https://github.com/sifive/fpga-shells
)
682
KiB
Languages
Scala
89.5%
Tcl
7.8%
Verilog
2%
Makefile
0.7%