Andrew Waterman
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ed280fb3de
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Remove empty when statement (???)
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2016-03-25 15:52:18 -07:00 |
|
Andrew Waterman
|
1ae6d09751
|
Slightly ameliorate D$->I$ critical path via scoreboard
|
2016-03-25 15:29:32 -07:00 |
|
Andrew Waterman
|
a4685a073f
|
Don't instantiate PTW when UseVM=false
|
2016-03-25 14:17:25 -07:00 |
|
Andrew Waterman
|
27b3cca046
|
Discover D$, PTW port counts dynamically
This is a generator, after all...
|
2016-03-25 14:16:56 -07:00 |
|
Andrew Waterman
|
8d1ba4d1ec
|
Remove hard-coded XLEN values from D$
|
2016-03-24 14:52:12 -07:00 |
|
Andrew Waterman
|
7ae44d4905
|
Add RV32 support
|
2016-03-10 17:32:00 -08:00 |
|
Andrew Waterman
|
82c595d11a
|
Fix no-FPU elaboration of CSR file
|
2016-03-10 17:30:56 -08:00 |
|
Andrew Waterman
|
bc15e8649e
|
WIP on priv spec v1.9
|
2016-03-02 23:29:58 -08:00 |
|
Yunsup Lee
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15ac4d317f
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RoCC PTW refactoring
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2016-02-25 17:15:38 -08:00 |
|
Christopher Celio
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b96343a4e5
|
[btb] fix mix type error for fetch-width > 1
closes #24
|
2016-02-08 17:41:38 -08:00 |
|
Christopher Celio
|
31dd311aff
|
[fpu] fix rounding mode bug in fdivfsqrt
|
2016-02-08 17:38:31 -08:00 |
|
Howard Mao
|
5abfd1a4ab
|
make sure to check for region violations in DMA frontend
|
2016-02-03 15:40:44 -08:00 |
|
Howard Mao
|
78579672d3
|
make mtvec configurable and writeable
|
2016-01-29 14:51:56 -08:00 |
|
Howard Mao
|
7937fbf074
|
fix number of IOMSHRs at 1
|
2016-01-29 14:51:56 -08:00 |
|
Howard Mao
|
305185c034
|
send DMA requests through MMIO and get responses through CSRs
|
2016-01-29 14:51:56 -08:00 |
|
Andrew Waterman
|
58fcc6b7c6
|
Get rid of useless mux
|
2016-01-28 11:44:59 -08:00 |
|
Howard Mao
|
d170fcd913
|
DecoupledHelper is now imported from junctions
|
2016-01-21 15:38:43 -08:00 |
|
Andrew Waterman
|
52d6b0b1a5
|
Improve ALU QoR
Rejigger muxes; share XOR gates between ADD/SUB, XOR, and BEQ.
|
2016-01-20 17:42:31 -08:00 |
|
Howard Mao
|
77e068c153
|
fix Chisel3 compat issue in SimpleHellaCacheIF
|
2016-01-14 22:42:44 -08:00 |
|
Howard Mao
|
120361226d
|
fix more Chisel3 deprecations
|
2016-01-14 14:46:31 -08:00 |
|
Howard Mao
|
d51c127646
|
fix deprecation warnings in rocket.scala
|
2016-01-13 22:08:06 -08:00 |
|
Andrew Waterman
|
ae98af7077
|
don't mix SInt/UInt
|
2016-01-12 16:27:36 -08:00 |
|
Andrew Waterman
|
00d17abd78
|
Don't ignore data value when writing MIPI
|
2016-01-12 16:23:06 -08:00 |
|
Andrew Waterman
|
7bf503a275
|
Remove four integer/FP converters
|
2016-01-12 16:06:23 -08:00 |
|
Andrew Waterman
|
31d537c405
|
Add missing cloneType
|
2016-01-12 15:45:11 -08:00 |
|
Howard Mao
|
13ce91e453
|
fix Chisel3 compat warnings in ICache and FPU
|
2016-01-12 12:43:48 -08:00 |
|
Howard Mao
|
05b359d357
|
support streaming DMA in DMA frontend
|
2016-01-06 18:17:41 -08:00 |
|
Howard Mao
|
304d8b814a
|
Implement client-side DMA controller
|
2015-12-16 21:24:24 -08:00 |
|
Albert Magyar
|
01a3447989
|
Remove duplicate PseudoLRU class from rocket TLB
|
2015-12-16 16:12:47 -08:00 |
|
Howard Mao
|
7690de07e1
|
allow icache to configure which side of the way mux gets buffered
|
2015-12-02 17:17:49 -08:00 |
|
Howard Mao
|
369ee74a2c
|
change names of RoCC tilelink interfaces to be more sensible
|
2015-12-02 16:28:23 -08:00 |
|
Howard Mao
|
73b0263663
|
disconnect fpu port if no fpu-using RoCC accelerators
|
2015-12-01 20:41:58 -08:00 |
|
Howard Mao
|
dcca0b1d86
|
fix up FPU connection
|
2015-12-01 18:14:58 -08:00 |
|
Howard Mao
|
08f77ca90d
|
Merge branch 'master' into rocc-fpu-port
|
2015-12-01 18:00:28 -08:00 |
|
Howard Mao
|
e76dfa55f7
|
change the way rocc is parameterized
|
2015-12-01 17:54:56 -08:00 |
|
Howard Mao
|
4833d41dbc
|
make the connection of FPU ports optional per accelerator
|
2015-12-01 16:48:05 -08:00 |
|
Howard Mao
|
0b15b19381
|
add arbiter for FPU
|
2015-12-01 10:22:31 -08:00 |
|
Howard Mao
|
1db2da00f3
|
Merge branch 'master' into rocc-fpu-port
|
2015-11-30 19:18:58 -08:00 |
|
Howard Mao
|
e80340198a
|
use implicit parameters for ALU
|
2015-11-30 17:35:33 -08:00 |
|
Howard Mao
|
9256239206
|
implement support for multiple RoCC accelerators
|
2015-11-26 12:46:01 -08:00 |
|
Howard Mao
|
58b0a86834
|
some modifications to AccumulatorExample
|
2015-11-26 08:48:19 -08:00 |
|
Andrew Waterman
|
e203b8b378
|
Make ALU generic for zscale
|
2015-11-24 19:17:07 -08:00 |
|
Andrew Waterman
|
5294e94794
|
Remove CSR back pressure ability
We were using it for IPIs, but no longer need it.
|
2015-11-24 18:28:14 -08:00 |
|
Andrew Waterman
|
4616db4695
|
Make RegFile/ImmGen usable by zscale
|
2015-11-24 18:27:07 -08:00 |
|
Andrew Waterman
|
6d1bf5c014
|
Use generic LoadGen/StoreGen
|
2015-11-24 18:13:33 -08:00 |
|
Sagar Karandikar
|
65632c875a
|
Merge branch 'master' into rocc-fpu-port
|
2015-11-21 02:24:38 -08:00 |
|
Howard Mao
|
b0a06a77db
|
fix a few Chisel3 compat issues
|
2015-11-20 13:33:15 -08:00 |
|
Yunsup Lee
|
94d2dd3053
|
Merge remote-tracking branch 'origin/master' into rocc-fpu-port
|
2015-11-16 23:29:25 -08:00 |
|
Andrew Waterman
|
0f092b9b59
|
Remove IPI network
This is now provided via MMIO.
|
2015-11-16 21:51:43 -08:00 |
|
Yunsup Lee
|
5e2698adbc
|
Merge remote-tracking branch 'origin/master' into rocc-fpu-port
|
2015-11-14 16:44:55 -08:00 |
|