riscv/rocket-chip
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Author SHA1 Message Date
Howard Mao
21f342ad42 fix typo causing L2 cache configuration to fail 2015-10-21 13:37:33 -07:00
Colin Schmidt
97f29b1618 Merge remote-tracking branch 'origin/master' into rocc-fpu-port 2015-10-21 11:33:42 -07:00
Howard Mao
02d113b39f outerDataBits / innerDataBits should be per beat, not per block 2015-10-21 11:31:13 -07:00
Howard Mao
d5a75fd113 accidentally committed some code I didn't mean to in Rocket 2015-10-21 09:21:54 -07:00
Howard Mao
0b7c828b5d go back to using standard LockingArbiter 2015-10-21 09:15:51 -07:00
Howard Mao
693a4ae00e fix some more memory system bugs 2015-10-20 23:29:59 -07:00
Howard Mao
baf95533a4 fix combinational loop in TileLink Unwrapper 2015-10-20 23:26:11 -07:00
Howard Mao
c68d9f8137 make ProbeUnit state machine easier to understand 2015-10-20 23:25:23 -07:00
Howard Mao
ffe7df2fed make sure TL -> NASTI converter acquire ready not dependent on valid 2015-10-20 22:09:22 -07:00
Howard Mao
c311c9938e nitpicky declaration move 2015-10-20 21:10:54 -07:00
Howard Mao
1c135c1628 fix ready-valid mixup in TileLink unwrapper 2015-10-20 21:07:42 -07:00
Henry Cook
62765e9609 L2 rowBits param bugfix 2015-10-20 18:57:19 -07:00
Howard Mao
11eacda84a generalize NastiReadDataArbiter 2015-10-20 18:36:19 -07:00
Henry Cook
3fc630405b Vectorize RoCC and Tile memory interfaces (bump uncore, rocket, zscale) 2015-10-20 15:05:12 -07:00
Henry Cook
1a1185be3f Vectorize ROCC and Tile memory interfaces 2015-10-20 15:02:24 -07:00
Henry Cook
4389b9edb0 tilelink parameter tweak: addrBits now a constant 2015-10-20 15:00:30 -07:00
Yunsup Lee
cedef98045 fix NASTI -> MemIO converter bug 2015-10-19 21:43:59 -07:00
Howard Mao
4346111d2a fix remaining vsim harness typo 2015-10-19 20:20:14 -07:00
Howard Mao
896aa892d1 bump uncore for TL -> NASTI converter fix 2015-10-19 15:31:59 -07:00
Howard Mao
d12403e7dc fix up and simplify TL -> NASTI converter logic 2015-10-19 13:47:13 -07:00
Colin Schmidt
2cee8c8bec Merge commit '3c3e35a56e954b35e6ceb17179ebadc52e8d9b3f' into rocc-fpu-port 2015-10-18 13:09:17 -07:00
Henry Cook
8c3370c2e3 L2 AMOALU bugfix and simpler TileLinkParameters (bump rocket, uncore, zscale) 2015-10-16 19:15:47 -07:00
Henry Cook
6f8997bee9 Minor refactor of StoreGen/AMOALU. 2015-10-16 19:12:46 -07:00
Henry Cook
1441590c3b add enabled field to BTBParameters 2015-10-16 19:12:39 -07:00
Henry Cook
d391f97953 Minor refactor of StoreGen/AMOALU. Bugfix for 32b ops in L2's AMOALU. 2015-10-16 19:11:06 -07:00
Henry Cook
e1f573918d simplify TileLinkParameters with Option 2015-10-16 18:24:38 -07:00
Howard Mao
49667aa4b0 make sure broadcast acquire tracker doesn't try to send requests back-to-back 2015-10-14 18:56:13 -07:00
Howard Mao
c4117eb9a2 make sure TL parameters change properly throughout 
* Outermost TL parameters should have the width set to be the same as the
   MIF data width.
 * Broadcast Hub and Narrower, which use different sets of TL parameters
   should use the proper set of parameters at each interface
 2015-10-14 18:03:39 -07:00
Howard Mao
1d362d6d3a make sure correct parameters are used for TileLink constructors 2015-10-14 17:58:54 -07:00
Henry Cook
969ecaecf8 pass parameters to BuildRoCC 2015-10-14 14:16:47 -07:00
Henry Cook
4270fd78a5 Merge branch 'param-refactor-tl' 2015-10-14 12:16:22 -07:00
Henry Cook
68cb54bc68 refactor tilelink params 2015-10-14 12:14:36 -07:00
Henry Cook
7fa3eb95e3 refactor tilelink params 2015-10-14 12:13:37 -07:00
Henry Cook
66ea39638e GlobalAddrMap 2015-10-14 00:23:28 -07:00
Henry Cook
31be6407ec Removed all traces of params 2015-10-14 00:23:28 -07:00
Henry Cook
908922c1a4 refactor NASTI to not use param 2015-10-14 00:23:28 -07:00
Henry Cook
da5fe84f53 Merge branch 'param-refactor' 2015-10-14 00:14:13 -07:00
Henry Cook
dd5052888d refactor tilelink params, compiles but ExampleSmallConfig fails 2015-10-13 23:44:05 -07:00
Howard Mao
47da284e56 TileLinkNarrower should do nothing if interfaces are the same width 2015-10-13 13:28:47 -07:00
Howard Mao
a44e054c77 add support for different TileLink and MIF data widths 2015-10-13 12:46:23 -07:00
Howard Mao
83df05cb6a add TileLink data narrower 2015-10-13 12:45:39 -07:00
Howard Mao
2fee3fd0fd make sure NASTI -> SMI converter still works if words per beat is 1 2015-10-13 12:44:48 -07:00
Howard Mao
993ed86198 move ReorderQueue to utils.scala 2015-10-13 09:49:22 -07:00
Henry Cook
9d11b64c75 added HasAddrMapParameters and GlobalAddrMap 2015-10-06 18:24:08 -07:00
Henry Cook
4508666d96 log2ceil 2015-10-06 18:22:47 -07:00
Henry Cook
8173695800 added HasAddrMapParameters 2015-10-06 18:22:40 -07:00
Henry Cook
166df221ad added HasAddrMapParameters 2015-10-06 18:15:16 -07:00
Henry Cook
1c489d75c1 inject params at top-level for MemDessert 2015-10-06 16:26:58 -07:00
Henry Cook
c4eadbda57 Removed all traces of params 2015-10-06 11:42:06 -07:00
Henry Cook
38ae2707a3 refactor MemIO to not use params 2015-10-06 11:41:48 -07:00