Howard Mao
|
a9e0a5e2df
|
changes to imports after uncore refactor
|
2016-06-28 14:09:31 -07:00 |
|
Colin Schmidt
|
e3816d5fc7
|
set invalidate_lr in other rocc examples (#47)
This should fix https://travis-ci.org/ucb-bar/rocket-chip/jobs/137607305
|
2016-06-14 16:59:37 -07:00 |
|
Andrew Waterman
|
bc15e8649e
|
WIP on priv spec v1.9
|
2016-03-02 23:29:58 -08:00 |
|
Yunsup Lee
|
15ac4d317f
|
RoCC PTW refactoring
|
2016-02-25 17:15:38 -08:00 |
|
Howard Mao
|
305185c034
|
send DMA requests through MMIO and get responses through CSRs
|
2016-01-29 14:51:56 -08:00 |
|
Andrew Waterman
|
31d537c405
|
Add missing cloneType
|
2016-01-12 15:45:11 -08:00 |
|
Howard Mao
|
304d8b814a
|
Implement client-side DMA controller
|
2015-12-16 21:24:24 -08:00 |
|
Howard Mao
|
369ee74a2c
|
change names of RoCC tilelink interfaces to be more sensible
|
2015-12-02 16:28:23 -08:00 |
|
Howard Mao
|
1db2da00f3
|
Merge branch 'master' into rocc-fpu-port
|
2015-11-30 19:18:58 -08:00 |
|
Howard Mao
|
9256239206
|
implement support for multiple RoCC accelerators
|
2015-11-26 12:46:01 -08:00 |
|
Howard Mao
|
58b0a86834
|
some modifications to AccumulatorExample
|
2015-11-26 08:48:19 -08:00 |
|
Colin Schmidt
|
652fb393a3
|
Merge remote-tracking branch 'origin/master' into rocc-fpu-port
|
2015-10-22 16:38:28 -07:00 |
|
Henry Cook
|
4f8468b60f
|
depend on external cde library
|
2015-10-21 18:19:23 -07:00 |
|
Colin Schmidt
|
97f29b1618
|
Merge remote-tracking branch 'origin/master' into rocc-fpu-port
|
2015-10-21 11:33:42 -07:00 |
|
Henry Cook
|
1a1185be3f
|
Vectorize ROCC and Tile memory interfaces
|
2015-10-20 15:02:24 -07:00 |
|
Colin Schmidt
|
2cee8c8bec
|
Merge commit '3c3e35a56e954b35e6ceb17179ebadc52e8d9b3f' into rocc-fpu-port
|
2015-10-18 13:09:17 -07:00 |
|
Henry Cook
|
84576650b5
|
Removed all traces of params
|
2015-10-05 21:48:05 -07:00 |
|
Colin Schmidt
|
cab12635f8
|
Merge master into rocc-fpu-port
ebb33f2f4b658211960a4c6c023c139420c67212
|
2015-08-06 08:03:10 -07:00 |
|
Andrew Waterman
|
f2dcc40e67
|
Chisel3 compatibility changes
|
2015-07-27 12:42:20 -07:00 |
|
Andrew Waterman
|
5b7f3c3006
|
Don't use clone
|
2015-07-15 17:30:50 -07:00 |
|
Andrew Waterman
|
be2ff6dec7
|
Vec(Reg) -> Reg(Vec)
|
2015-07-15 12:33:46 -07:00 |
|
Albert Ou
|
ca5b3d988d
|
Merge branch 'master' into rocc-fpu-port
|
2015-04-19 15:00:00 -07:00 |
|
Henry Cook
|
3048f4785a
|
HeaderlessTileLinkIO -> ClientTileLinkIO
|
2015-04-17 16:56:53 -07:00 |
|
Colin Schmidt
|
73fa28521d
|
Merge branch 'master' of github.com:ucb-bar/rocket into rocc-fpu-port
|
2015-04-16 15:22:08 -07:00 |
|
Henry Cook
|
91e882e3f8
|
Use HeaderlessTileLinkIO
|
2015-04-13 15:58:10 -07:00 |
|
Christopher Celio
|
a564f08702
|
Rename dmem.sret signal to more accurate invalidate_lr
|
2015-04-11 02:26:33 -07:00 |
|
Colin Schmidt
|
a369d8f17f
|
Add fpu port to the rocc interface
|
2015-04-02 01:30:11 -07:00 |
|
Henry Cook
|
51e4cd7616
|
Added UncachedTileLinkIO port to RocketTile, simplify arbitration
|
2015-03-12 16:30:04 -07:00 |
|
Henry Cook
|
95aa295c39
|
Use HeaderlessTileLinkIO to cut down on unconnected port errors in VCS
|
2015-03-09 16:34:43 -07:00 |
|
Henry Cook
|
b36d751250
|
sret bugfix: bypass arbiter
|
2015-03-05 13:14:16 -08:00 |
|
Henry Cook
|
741e6b77ad
|
Rename some params, use refactored TileLink
|
2015-02-01 20:37:31 -08:00 |
|
Henry Cook
|
c9320862ae
|
add l2 dmem signal to rocc
|
2014-12-12 16:55:08 -08:00 |
|
Yunsup Lee
|
8abf62fae3
|
add LICENSE
|
2014-09-12 18:06:41 -07:00 |
|
Henry Cook
|
0dac9a7467
|
Full conversion to params. Compiles but does not elaborate.
|
2014-08-19 11:38:02 -07:00 |
|
Andrew Waterman
|
e91e12ed88
|
Fix RoCC accumulator example
|
2014-05-14 16:17:39 -07:00 |
|
Andrew Waterman
|
4ca152b012
|
Use BundleWithConf to avoid clone method boilerplate
|
2014-05-09 19:37:16 -07:00 |
|
Henry Cook
|
910b3b203a
|
removed AddressSpaceConstants, CacheConstants, and TileLinkSizeConstants
|
2014-04-10 12:32:44 -07:00 |
|
Yunsup Lee
|
ff7cae29f7
|
hookup rocc interrupt and s bit
|
2014-02-06 00:09:42 -08:00 |
|
Yunsup Lee
|
ab4a3e937b
|
don't share fma pipes
|
2014-02-05 14:21:43 -08:00 |
|
Stephen Twigg
|
3c3c469725
|
Add exception signal to rocc interface
|
2014-01-28 22:13:16 -08:00 |
|
Quan Nguyen
|
3b109763ad
|
Connect FMA to Hwacha pipes
|
2013-11-19 20:54:47 -08:00 |
|
Yunsup Lee
|
4c56323f6f
|
hookup all memory ports
|
2013-11-05 17:12:09 -08:00 |
|
Stephen Twigg
|
730a6ec76b
|
AccumulatorExample now properly sets its busy bit. Also, pepper some helpful comments into AccumulatorExample
|
2013-09-24 16:32:49 -07:00 |
|
Andrew Waterman
|
adc386f889
|
Turn off virtual memory inside RoCC base class
|
2013-09-24 13:58:47 -07:00 |
|
Stephen Twigg
|
3532ae0b79
|
From Andrew, actually mark scoreboard when rocc instruction with a writeback is issued. Also, fix an issue with AccumulatorExample not properly tagging its memory requests. Finally, reverted changes from f27429c to more properly follow the spike model (always return previous value of accumulator).
|
2013-09-24 10:54:09 -07:00 |
|
Stephen Twigg
|
db1e09f0d0
|
Fix issues with RoCC AccumulatorExample stalls on memory interface
|
2013-09-23 00:21:43 -07:00 |
|
Stephen Twigg
|
158cee08af
|
Adjust ordering of RoCCInstruction to reflect new ISA encoding. (Note: Fixes register op issues with AccumulatorExample but still slight issue with executing memory loads)
|
2013-09-22 03:18:06 -07:00 |
|
Andrew Waterman
|
f12bbc1e43
|
working RoCC AccumulatorExample
|
2013-09-14 22:34:53 -07:00 |
|
Andrew Waterman
|
a0cb711451
|
Start adding RoCC
|
2013-09-14 15:31:50 -07:00 |
|
Andrew Waterman
|
d053bdc89f
|
Remove Hwacha from Rocket
Soon it will use the coprocessor interface.
|
2013-09-12 22:34:38 -07:00 |
|