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0dc8cd5b11
|
move ReorderQueue and DecoupledHelper to junctions
|
2016-01-21 15:36:22 -08:00 |
|
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6a0352c6d0
|
fix up SmiMem
|
2016-01-20 23:25:16 -08:00 |
|
|
52d6b0b1a5
|
Improve ALU QoR
Rejigger muxes; share XOR gates between ADD/SUB, XOR, and BEQ.
|
2016-01-20 17:42:31 -08:00 |
|
|
fdd19145e9
|
bump chisel/hardfloat/junctions/uncore submodules
|
2016-01-17 01:50:04 -08:00 |
|
|
2946bc928e
|
Avoid muxing between bundles of different size
|
2016-01-16 19:01:24 -08:00 |
|
|
04fd407c3e
|
bump rocket submodule pointer
|
2016-01-15 15:29:23 -08:00 |
|
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335fb73120
|
Chisel3 compatibility fix
No need for a Vec here.
|
2016-01-15 15:17:16 -08:00 |
|
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77e068c153
|
fix Chisel3 compat issue in SimpleHellaCacheIF
|
2016-01-14 22:42:44 -08:00 |
|
|
3b4b7126ed
|
Chisel3 compile-time deprecations should be runtime errors
|
2016-01-14 15:12:41 -08:00 |
|
|
33aa64212d
|
fix more Chisel3 deprecations
|
2016-01-14 15:06:30 -08:00 |
|
|
4ff1aea288
|
fix more Chisel3 deprecations
|
2016-01-14 14:55:45 -08:00 |
|
|
120361226d
|
fix more Chisel3 deprecations
|
2016-01-14 14:46:31 -08:00 |
|
|
c8fa7c43a9
|
fix Chisel3 deprecation warnings
|
2016-01-14 13:38:00 -08:00 |
|
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d51c127646
|
fix deprecation warnings in rocket.scala
|
2016-01-13 22:08:06 -08:00 |
|
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fc638c6339
|
Chisel3 compatibility fixes
|
2016-01-12 16:28:05 -08:00 |
|
|
ae98af7077
|
don't mix SInt/UInt
|
2016-01-12 16:27:36 -08:00 |
|
|
603db5e271
|
Chisel3 compatibility; new NaNs; new MIPI behavior
|
2016-01-12 16:25:03 -08:00 |
|
|
00d17abd78
|
Don't ignore data value when writing MIPI
|
2016-01-12 16:23:06 -08:00 |
|
|
7bf503a275
|
Remove four integer/FP converters
|
2016-01-12 16:06:23 -08:00 |
|
|
31d537c405
|
Add missing cloneType
|
2016-01-12 15:45:11 -08:00 |
|
|
0b90b8fe5f
|
Avoid zero-width wire case :-/
|
2016-01-12 15:32:29 -08:00 |
|
|
a953ff384a
|
Chisel3 compatibility: use more concrete types
|
2016-01-12 15:32:14 -08:00 |
|
|
13ce91e453
|
fix Chisel3 compat warnings in ICache and FPU
|
2016-01-12 12:43:48 -08:00 |
|
|
c06884b78c
|
lowercase SMI to Smi
|
2016-01-11 17:44:10 -08:00 |
|
|
04e1f8c5c3
|
lowercase SMI to Smi
|
2016-01-11 16:18:49 -08:00 |
|
|
c81745eb8e
|
lowercase SMI to Smi
|
2016-01-11 16:18:44 -08:00 |
|
|
5d7b5b219f
|
lowercase SMI to Smi
|
2016-01-11 16:18:38 -08:00 |
|
|
d0a14c6de9
|
separate TileLink converter/wrapper/unwrapper/narrower into separate file
|
2016-01-11 16:14:56 -08:00 |
|
|
8d1afa4197
|
bump fpga repo
|
2016-01-09 17:50:29 -08:00 |
|
|
806e40d19b
|
implement DMA streaming functionality
|
2016-01-07 19:26:15 -08:00 |
|
|
9d2637c2c7
|
support empty submaps in interconnect generator
|
2016-01-07 11:55:24 -08:00 |
|
|
80d97d5f9e
|
test DMA streaming
|
2016-01-06 21:38:12 -08:00 |
|
|
46069ea13b
|
implement streaming DMA functionality
|
2016-01-06 21:37:56 -08:00 |
|
|
05b359d357
|
support streaming DMA in DMA frontend
|
2016-01-06 18:17:41 -08:00 |
|
|
673f73b051
|
add support for AXI streaming protocol
|
2016-01-05 20:04:49 -08:00 |
|
|
2f71a3da5a
|
bump up submodule commits to merge commits
Github's PR system doesn't work so well with submodules, since it always
creates merge commits. We should probably avoid using it in the future.
|
2015-12-22 08:09:24 -08:00 |
|
|
0f51ca4c10
|
Merge pull request #35 from ucb-bar/dma
Implement DMA unit
|
2015-12-22 10:33:59 -05:00 |
|
|
b8d0376d3f
|
Merge pull request #1 from ucb-bar/dma
add DMA test
|
2015-12-22 10:33:48 -05:00 |
|
|
dbe68056d9
|
Merge pull request #21 from ucb-bar/dma
Implement client-side DMA controller
|
2015-12-22 10:33:28 -05:00 |
|
|
09f3c5a6e3
|
Merge pull request #6 from ucb-bar/dma
Implement DMA engine
|
2015-12-21 13:54:38 -08:00 |
|
|
8190bf6e18
|
implement DMA unit
|
2015-12-16 21:27:48 -08:00 |
|
|
872b162e1b
|
implement DMA engine
|
2015-12-16 21:27:31 -08:00 |
|
|
24eecee148
|
add DMA test
|
2015-12-16 21:26:22 -08:00 |
|
|
304d8b814a
|
Implement client-side DMA controller
|
2015-12-16 21:24:24 -08:00 |
|
|
8a61177224
|
generalize TwoWayCounter
|
2015-12-16 21:07:30 -08:00 |
|
|
1a272677ca
|
more fixes to L2 cache
|
2015-12-16 21:06:39 -08:00 |
|
|
4858ca9a60
|
add a regression to test proper writeback
|
2015-12-16 21:05:56 -08:00 |
|
|
a48237f36d
|
get rid of the rest of the PutBlock special casing in L2
|
2015-12-16 20:56:29 -08:00 |
|
|
01a3447989
|
Remove duplicate PseudoLRU class from rocket TLB
|
2015-12-16 16:12:47 -08:00 |
|
|
560fdc19a8
|
add PLRU replacement option to L2 cache
|
2015-12-16 10:24:57 -08:00 |
|