riscv/rocket-chip
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more fixes to L2 cache

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This commit is contained in:
Howard Mao 2015-12-16 21:06:39 -08:00
parent 560fdc19a8
commit 1a272677ca
3 changed files with 4 additions and 2 deletions
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2
groundtest

@ -1 +1 @@
Subproject commit f398b3213e3e9411f9014b418a8e7cfa669c5f8b
Subproject commit 49a2e33ad9a91d3dbf58b0342b43d4e60db87104

2
src/main/scala/TestConfigs.scala
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@ -57,6 +57,7 @@ class WithBroadcastRegressionTest extends Config(
(id: Int, p: Parameters) => Module(new RegressionTest()(p))
case GroundTestRegressions =>
(p: Parameters) => RegressionTests.broadcastRegressions(p)
case GroundTestMaxXacts => 3
})
class WithCacheRegressionTest extends Config(
@ -65,6 +66,7 @@ class WithCacheRegressionTest extends Config(
(id: Int, p: Parameters) => Module(new RegressionTest()(p))
case GroundTestRegressions =>
(p: Parameters) => RegressionTests.cacheRegressions(p)
case GroundTestMaxXacts => 3
})
class GroundTestConfig extends Config(new WithGroundTest ++ new DefaultConfig)

2
uncore

@ -1 +1 @@
Subproject commit f9eda0ebb010a4bf99609d2ef6f93b85756e3ccb
Subproject commit 3bb143cc36fba3433b0ceb4256ea11a8a00155ea