support empty submaps in interconnect generator
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@ -555,12 +555,17 @@ class NastiRecursiveInterconnect(
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io.slaves(slaveInd) <> xbarSlave
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slaveInd += 1
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case MemSubmap(_, submap) =>
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val subSlaves = submap.countSlaves
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val outputs = Vec(io.slaves.drop(slaveInd).take(subSlaves))
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val ic = Module(new NastiRecursiveInterconnect(1, subSlaves, submap, start))
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ic.io.masters.head <> xbarSlave
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outputs <> ic.io.slaves
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slaveInd += subSlaves
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if (submap.isEmpty) {
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val err_slave = Module(new NastiErrorSlave)
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err_slave.io <> xbarSlave
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} else {
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val subSlaves = submap.countSlaves
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val outputs = Vec(io.slaves.drop(slaveInd).take(subSlaves))
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val ic = Module(new NastiRecursiveInterconnect(1, subSlaves, submap, start))
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ic.io.masters.head <> xbarSlave
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outputs <> ic.io.slaves
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slaveInd += subSlaves
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}
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case MemChannels(_, nchannels, _) =>
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require(nchannels == 1, "Recursive interconnect cannot handle MultiChannel interface")
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io.slaves(slaveInd) <> xbarSlave
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