Howard Mao
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304d8b814a
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Implement client-side DMA controller
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2015-12-16 21:24:24 -08:00 |
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Albert Magyar
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01a3447989
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Remove duplicate PseudoLRU class from rocket TLB
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2015-12-16 16:12:47 -08:00 |
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Howard Mao
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7690de07e1
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allow icache to configure which side of the way mux gets buffered
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2015-12-02 17:17:49 -08:00 |
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Howard Mao
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369ee74a2c
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change names of RoCC tilelink interfaces to be more sensible
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2015-12-02 16:28:23 -08:00 |
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Howard Mao
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f67b02fadb
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Merge branch 'rocc-fpu-port'
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2015-12-02 08:52:15 -08:00 |
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Howard Mao
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73b0263663
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disconnect fpu port if no fpu-using RoCC accelerators
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2015-12-01 20:41:58 -08:00 |
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Howard Mao
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3f8f726296
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make rocc build independent from parameter structure
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2015-12-01 18:47:52 -08:00 |
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Howard Mao
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dcca0b1d86
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fix up FPU connection
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2015-12-01 18:14:58 -08:00 |
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Howard Mao
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08f77ca90d
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Merge branch 'master' into rocc-fpu-port
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2015-12-01 18:00:28 -08:00 |
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Howard Mao
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e76dfa55f7
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change the way rocc is parameterized
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2015-12-01 17:54:56 -08:00 |
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Howard Mao
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4833d41dbc
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make the connection of FPU ports optional per accelerator
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2015-12-01 16:48:05 -08:00 |
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Howard Mao
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0b15b19381
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add arbiter for FPU
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2015-12-01 10:22:31 -08:00 |
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Howard Mao
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1db2da00f3
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Merge branch 'master' into rocc-fpu-port
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2015-11-30 19:18:58 -08:00 |
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Howard Mao
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e80340198a
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use implicit parameters for ALU
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2015-11-30 17:35:33 -08:00 |
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Colin Schmidt
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90991014a0
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Merge pull request #19 from ucb-bar/multirocc
Add support for multiple RoCC accelerators
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2015-11-28 08:56:04 -05:00 |
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Howard Mao
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9256239206
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implement support for multiple RoCC accelerators
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2015-11-26 12:46:01 -08:00 |
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Howard Mao
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58b0a86834
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some modifications to AccumulatorExample
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2015-11-26 08:48:19 -08:00 |
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Andrew Waterman
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e203b8b378
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Make ALU generic for zscale
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2015-11-24 19:17:07 -08:00 |
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Andrew Waterman
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5294e94794
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Remove CSR back pressure ability
We were using it for IPIs, but no longer need it.
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2015-11-24 18:28:14 -08:00 |
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Andrew Waterman
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4616db4695
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Make RegFile/ImmGen usable by zscale
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2015-11-24 18:27:07 -08:00 |
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Andrew Waterman
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6d1bf5c014
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Use generic LoadGen/StoreGen
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2015-11-24 18:13:33 -08:00 |
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Sagar Karandikar
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65632c875a
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Merge branch 'master' into rocc-fpu-port
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2015-11-21 02:24:38 -08:00 |
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Howard Mao
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b0a06a77db
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fix a few Chisel3 compat issues
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2015-11-20 13:33:15 -08:00 |
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Yunsup Lee
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94d2dd3053
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-11-16 23:29:25 -08:00 |
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Andrew Waterman
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0f092b9b59
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Remove IPI network
This is now provided via MMIO.
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2015-11-16 21:51:43 -08:00 |
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Yunsup Lee
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5e2698adbc
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-11-14 16:44:55 -08:00 |
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Yunsup Lee
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213c1a4c81
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fix fdiv/fsqrt control bug in fpu
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2015-11-14 16:43:15 -08:00 |
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Yunsup Lee
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4dd097d156
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-11-14 14:52:13 -08:00 |
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Yunsup Lee
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3c3c946755
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move to new version of hardfloat
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2015-11-14 14:49:17 -08:00 |
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Yunsup Lee
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608e4b2851
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-11-12 20:44:25 -08:00 |
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Howard Mao
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19daee10f0
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use default constructors for IOMSHR acquire construction
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2015-11-12 15:54:05 -08:00 |
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Andrew Waterman
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59ca373146
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Merge pull request #18 from jackkoenig/master
Fix SimpleHellaCacheIF assumption about receiving rejected request ba…
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2015-11-08 22:38:01 -08:00 |
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jackkoenig
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1e259a55da
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Fix SimpleHellaCacheIF assumption about receiving rejected request back 2 cycles later
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2015-11-08 21:16:31 -08:00 |
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Yunsup Lee
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df5daaa72e
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-11-06 23:57:42 -08:00 |
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Andrew Waterman
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2f515b2af6
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Reduce critical path for fdiv valid signal
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2015-11-06 23:28:31 -08:00 |
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Colin Schmidt
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86d67051b2
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Merge commit 'e31be75' into rocc-fpu-port
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2015-10-26 16:29:51 -07:00 |
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Yunsup Lee
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c7235fecb5
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further state optimization in CSRfile when not UseVM
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2015-10-25 10:23:46 -07:00 |
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Colin Schmidt
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652fb393a3
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-10-22 16:38:28 -07:00 |
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Jim Lawson
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0c587704a7
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Add ability to generate libraryDependency on cde.
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2015-10-22 11:37:20 -07:00 |
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Henry Cook
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4f8468b60f
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depend on external cde library
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2015-10-21 18:19:23 -07:00 |
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Colin Schmidt
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942f6a7d7f
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Merge commit 'd1eae61970f864afe4fde8ca7f75380c70c4658f' into rocc-fpu-port
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2015-10-21 17:18:20 -07:00 |
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Colin Schmidt
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97f29b1618
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Merge remote-tracking branch 'origin/master' into rocc-fpu-port
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2015-10-21 11:33:42 -07:00 |
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Howard Mao
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0b7c828b5d
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go back to using standard LockingArbiter
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2015-10-21 09:15:51 -07:00 |
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Howard Mao
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c68d9f8137
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make ProbeUnit state machine easier to understand
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2015-10-20 23:25:23 -07:00 |
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Henry Cook
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1a1185be3f
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Vectorize ROCC and Tile memory interfaces
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2015-10-20 15:02:24 -07:00 |
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Colin Schmidt
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2cee8c8bec
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Merge commit '3c3e35a56e954b35e6ceb17179ebadc52e8d9b3f' into rocc-fpu-port
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2015-10-18 13:09:17 -07:00 |
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Henry Cook
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6f8997bee9
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Minor refactor of StoreGen/AMOALU.
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2015-10-16 19:12:46 -07:00 |
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Henry Cook
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1441590c3b
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add enabled field to BTBParameters
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2015-10-16 19:12:39 -07:00 |
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Henry Cook
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969ecaecf8
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pass parameters to BuildRoCC
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2015-10-14 14:16:47 -07:00 |
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Henry Cook
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68cb54bc68
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refactor tilelink params
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2015-10-14 12:14:36 -07:00 |
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