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2c2b3a7678
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cleanups supporting uncore hierarchy
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2014-01-31 12:07:26 -08:00 |
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febd26f505
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Correct CSR privilege logic
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2014-01-31 01:03:17 -08:00 |
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0266c1f76a
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Support retirement width > 1 in CSR file
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2014-01-24 16:37:40 -08:00 |
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267394d3cc
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Fix CSR interlocks
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2014-01-24 16:37:40 -08:00 |
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1f986d1c96
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Branches don't care about the ALU input/function
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2014-01-24 16:37:40 -08:00 |
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a1b7774f5d
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Simplify handling of CAUSE register
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2014-01-24 16:37:39 -08:00 |
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a2be21361e
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Allow ICacheConfig to toggle fetch-width.
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2014-01-22 16:19:57 -08:00 |
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a7489920ce
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Support CSR atomics on all CSRs, not just STATUS
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2014-01-21 16:17:39 -08:00 |
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6ba2c1abe5
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Use auto-generated CAUSE constants
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2014-01-21 15:01:54 -08:00 |
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95de358a96
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More of the same FPU fix
some SP ops followed by DP stores were not working because they
were encoded as subnormals, not NaNs.
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2014-01-17 14:09:30 -08:00 |
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cf38001e98
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Fix fmv.s.x -> fsd
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2014-01-17 03:52:35 -08:00 |
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57f4d89c90
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Generate D$ replay_next signals correctly
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2014-01-16 00:16:09 -08:00 |
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6ebdc4d94e
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Simplify store conditional failure code generation
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2014-01-16 00:15:48 -08:00 |
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31060ea8ae
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Fix fubar long-latency writeback control logic
Load miss writebacks happening at the same time as multiplication
wasn't working. Hopefully this does it.
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2014-01-14 04:02:43 -08:00 |
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e8486817e6
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Clean up formatting (i.e. remove tabs, semicolons)
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2014-01-13 21:43:56 -08:00 |
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a50a1f7d50
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Clean up multiplier/divider stuff
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2014-01-13 21:37:16 -08:00 |
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4d236979bd
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Fix very far forward JALs
We were sign-extending from the wrong bit, causing a backwards jump.
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2014-01-13 00:55:48 -08:00 |
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c546f66404
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Swap JAL/JALR encodings (again)
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2014-01-13 00:54:49 -08:00 |
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07a91bb99a
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Miscellaneous cleanup
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2013-12-09 19:53:14 -08:00 |
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da3135ac9b
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Begin integer unit clean-up
...to make it easier to generate the superscalar version of the core.
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2013-12-09 15:06:13 -08:00 |
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16d5250924
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Correct FP trap behavior on FCSR
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2013-12-05 04:18:04 -08:00 |
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5814a90472
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Make DecodeLogic interface more flexible
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2013-12-05 04:16:48 -08:00 |
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924261e2b2
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Update to new privileged ISA... phew
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2013-11-25 04:35:15 -08:00 |
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65b8340cea
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Mitigate D$ hit -> branch -> NPC critical path
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2013-11-24 14:21:03 -08:00 |
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53f726008b
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Use Mem instead of Vec[Reg] for TLB
QoR-neutral, improves simulation speed
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2013-11-24 14:21:02 -08:00 |
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68e270eeb2
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fix slli/slliw encoding bug
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2013-11-21 14:44:58 -08:00 |
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c1966e2b0a
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forgot to put htif into uncore package
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2013-11-07 15:42:03 -08:00 |
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da033af0b0
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move htif to uncore
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2013-11-07 13:18:46 -08:00 |
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12f0369e6e
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Simplify divide early out circuitry
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2013-10-29 13:20:40 -07:00 |
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b44dafbdca
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Simplify branch offset mux
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2013-10-29 13:20:40 -07:00 |
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23f7bab4f3
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Reduce FMA pipeline depths
FMA QoR has improved enough to allow this change.
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2013-10-29 13:20:40 -07:00 |
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1583560757
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fix replay bug, don't respond when cmd is a NOP
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2013-10-28 22:35:18 -07:00 |
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36b85b8ee2
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Fix issue where the MSB of D$ req tag was getting lost for all agents when an accelerator was attached.
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2013-09-25 11:51:10 -07:00 |
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891e459625
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Export stats pcr register (#28 currently) to the top-level
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2013-09-25 01:16:32 -07:00 |
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730a6ec76b
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AccumulatorExample now properly sets its busy bit. Also, pepper some helpful comments into AccumulatorExample
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2013-09-24 16:32:49 -07:00 |
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81c752de84
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Support disabling virtual memory
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2013-09-24 13:58:47 -07:00 |
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adc386f889
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Turn off virtual memory inside RoCC base class
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2013-09-24 13:58:47 -07:00 |
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3532ae0b79
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From Andrew, actually mark scoreboard when rocc instruction with a writeback is issued. Also, fix an issue with AccumulatorExample not properly tagging its memory requests. Finally, reverted changes from f27429c to more properly follow the spike model (always return previous value of accumulator).
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2013-09-24 10:54:09 -07:00 |
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db1e09f0d0
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Fix issues with RoCC AccumulatorExample stalls on memory interface
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2013-09-23 00:21:43 -07:00 |
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158cee08af
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Adjust ordering of RoCCInstruction to reflect new ISA encoding. (Note: Fixes register op issues with AccumulatorExample but still slight issue with executing memory loads)
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2013-09-22 03:18:06 -07:00 |
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1d2f4f8437
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New ISA encoding, AUIPC semantics
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2013-09-21 06:32:40 -07:00 |
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25ab402932
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swap JAL, JALR encodings
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2013-09-15 04:29:06 -07:00 |
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110e53cb48
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Revert "Add early out to multiplier"
This broke recently and I don't have time to figure out why.
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2013-09-15 04:15:32 -07:00 |
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88d1c47665
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don't disassemble within chisel
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2013-09-15 04:14:45 -07:00 |
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f12bbc1e43
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working RoCC AccumulatorExample
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2013-09-14 22:34:53 -07:00 |
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18968dfbc7
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Move store data generation into cache
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2013-09-14 16:15:07 -07:00 |
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a0cb711451
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Start adding RoCC
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2013-09-14 15:31:50 -07:00 |
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d053bdc89f
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Remove Hwacha from Rocket
Soon it will use the coprocessor interface.
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2013-09-12 22:34:38 -07:00 |
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1edb1e2a0a
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Ignore LSB of PC
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2013-09-12 17:55:58 -07:00 |
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59f5358435
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Implement AQ/RL; move fence logic out of cache
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2013-09-12 16:07:30 -07:00 |
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