Howard Mao
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f62c74b82a
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allow groundtest to use non-blocking DCache
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2016-07-07 18:59:09 -07:00 |
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Howard Mao
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67871654dd
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start NastiConverterTest higher up in memory
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2016-07-07 14:35:04 -07:00 |
|
Howard Mao
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9f7845f043
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don't test BRAMSlave for now
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2016-07-06 16:56:14 -07:00 |
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Andrew Waterman
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8625f9ea0c
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Update PTE format
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2016-07-06 03:20:41 -07:00 |
|
Howard Mao
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ee624b1c6e
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make NastiSmallTest a bit more intensive
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2016-07-05 17:31:51 -07:00 |
|
Howard Mao
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8c5fd86f9b
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fix tracegen module and scripts
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2016-07-05 13:50:17 -07:00 |
|
Howard Mao
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61a44dcfc3
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add regression test for L1 voluntary releases
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2016-07-04 17:02:24 -07:00 |
|
Howard Mao
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7f0a583515
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timeout for Nasti tests
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2016-07-01 18:11:44 -07:00 |
|
Howard Mao
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37599fb0c9
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fix use of width adapter in NastiConverterTest
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2016-07-01 17:05:41 -07:00 |
|
Howard Mao
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f46efb671d
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add multi-transaction timer and add to Comparator
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2016-06-30 17:39:10 -07:00 |
|
Howard Mao
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e83b3d2472
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turn up generator memory timeout
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2016-06-29 10:57:31 -07:00 |
|
Howard Mao
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80670c08d7
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changes to imports after uncore refactor
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2016-06-28 13:15:56 -07:00 |
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Howard Mao
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f438e7048c
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no longer need DummyCache since tiles no longer require cached interface
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2016-06-27 16:32:06 -07:00 |
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Howard Mao
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7fea376f8c
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make comparator fit into GroundTest interface
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2016-06-27 16:00:24 -07:00 |
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Howard Mao
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238ce99f5c
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fix requirement in Comparator
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2016-06-23 15:47:09 -07:00 |
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Andrew Waterman
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6fb07b1b79
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Remove legacy HTIF things
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2016-06-23 13:19:31 -07:00 |
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Andrew Waterman
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1844bac5bc
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Use stop() to exit cleanly
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2016-06-23 12:16:37 -07:00 |
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Howard Mao
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0967f3cfed
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use MuxCase and MuxLookup instead of MuxBundle
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2016-06-21 14:01:23 -07:00 |
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Howard Mao
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181b11bf20
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allow Comparator to disable prefetches (for testing BroadcastHub)
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2016-06-16 15:14:02 -07:00 |
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Howard Mao
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a43a93b55c
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add BRAMSlave unittest
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2016-06-16 15:13:40 -07:00 |
|
Howard Mao
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377de06b72
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fix comparator Chisel2 compilation issue
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2016-06-14 18:36:38 -07:00 |
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Howard Mao
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b7c0d0cb4d
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test both cached and uncached cases in MixedAllocPutRegression
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2016-06-14 17:32:29 -07:00 |
|
Howard Mao
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1074c9fe6d
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change the way regression IOs are assigned
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2016-06-14 11:06:45 -07:00 |
|
Howard Mao
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e284257052
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fully disable the cache when not using it in regression tests
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2016-06-14 11:06:45 -07:00 |
|
Howard Mao
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3e105eb352
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make sure MixedAllocPutRegression uses a block that hasn't been cached already
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2016-06-13 18:17:48 -07:00 |
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Howard Mao
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fe8d81958f
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fix groundtests to fit new way of parameterizing TileLink clients
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2016-06-13 16:17:27 -07:00 |
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Howard Mao
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a921458758
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add a regression test for no-alloc Put following an alloc Put
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2016-06-13 16:17:27 -07:00 |
|
Palmer Dabbelt
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0c695d8e83
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Use the new TileLink to Smi converter (#10)
I pulled out the TileLink to Smi converter and put it in uncore so I can
use it for my own stuff.
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2016-06-10 14:04:48 -07:00 |
|
Wesley W. Terpstra
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5562241a50
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comparator: a new TileLink stress-tester
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2016-06-09 14:02:35 -07:00 |
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Colin Schmidt
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40b6e44816
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name resetSignal parameter to tile constructor
if the tile constructor were to change groundtest
only needs to be updated if resetSignal is removed or renamed
|
2016-06-09 10:20:48 -07:00 |
|
Howard Mao
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21feeb4a4f
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have multiple outstanding requests in CacheFillTest
|
2016-06-08 19:53:42 -07:00 |
|
Howard Mao
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f44778fa56
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make sure Cached generator comparison truncates to correct size
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2016-06-06 17:45:04 -07:00 |
|
Howard Mao
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022503748e
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make Memtest generators more configurable
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2016-06-06 09:44:09 -07:00 |
|
Howard Mao
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2163ebfca3
|
use a generic Nasti memory driver for unit tests
|
2016-06-06 09:43:39 -07:00 |
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Andrew Waterman
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cf8be98b2b
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Cope with changes to AddrMap
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2016-06-03 13:48:43 -07:00 |
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Howard Mao
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a917f554fd
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use Wesley's test SRAM for AXI -> AHB converter test
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2016-06-01 11:40:59 -07:00 |
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Howard Mao
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8f269b2eec
|
stall for more cycles in Hasti test
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2016-05-31 19:46:42 -07:00 |
|
Andrew Waterman
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75f06d6e84
|
Use generic TileLink width adapter
|
2016-05-26 16:00:17 -07:00 |
|
Andrew Waterman
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ddfa30e215
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Work around zero-width wire limitations
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2016-05-26 00:48:54 -07:00 |
|
Matthew Naylor
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213bb26367
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Drive invalidate_lr signal
The DCache input for invalidating LR reservations was dangling. Now
we wire it to false.
|
2016-05-25 13:27:12 +01:00 |
|
Matthew Naylor
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05c0808ff2
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Update trace generation and checking scripts
Pass the elf file (that specifies the tohost and fromhost addresses)
to the emulator in the trace generator & checker scripts.
|
2016-05-23 17:02:15 +01:00 |
|
Howard Mao
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87be2bcd60
|
make sure TraceGen addresses are correct
|
2016-05-20 16:12:11 -07:00 |
|
Howard Mao
|
3e759d2575
|
add Hasti test to unit test
|
2016-05-06 11:31:43 -07:00 |
|
Howard Mao
|
1882e694e4
|
only write to a single tohost location
|
2016-05-03 20:20:52 -07:00 |
|
Howard Mao
|
6cb0979ac4
|
fix CacheFillTest
|
2016-05-03 13:35:38 -07:00 |
|
Howard Mao
|
518d510622
|
only write out finish from tile 0 in groundtest
|
2016-05-03 13:09:22 -07:00 |
|
Howard Mao
|
b95f095aca
|
write to multiple possible tohost locations
|
2016-05-02 20:11:20 -07:00 |
|
Howard Mao
|
4b4e8f7f62
|
fixes for priv-1.9 changes
|
2016-05-02 18:25:02 -07:00 |
|
Howard Mao
|
5e793427eb
|
use address map instead of MMIOBase
|
2016-04-21 15:38:43 -07:00 |
|
Howard Mao
|
82cacfbc5e
|
add NastiMemoryDemux to unit tests
|
2016-04-19 09:34:42 -07:00 |
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