Howard Mao
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e71293e2ae
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fix bug in narrower logic
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2015-12-06 02:58:12 -08:00 |
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Howard Mao
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484e8ce20b
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add regression tests for catching specific memory bugs
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2015-12-06 02:57:45 -08:00 |
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Howard Mao
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4f5dabcda2
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add SCR file to device tree
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2015-12-05 00:28:58 -08:00 |
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Howard Mao
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c57639b23f
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reverse order of RWX bits for compatibility
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2015-12-05 00:27:24 -08:00 |
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Howard Mao
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6fc1e92708
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add option to print cycle count regardless of exit status
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2015-12-04 12:04:13 -08:00 |
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Sagar Karandikar
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93aa370b87
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yunsup's fix for dgemm-opt assertion failure
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2015-12-03 14:03:10 -08:00 |
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Howard Mao
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f35b83d3ca
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allow configuration of rocket ICache buffering
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2015-12-02 17:18:39 -08:00 |
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Howard Mao
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7690de07e1
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allow icache to configure which side of the way mux gets buffered
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2015-12-02 17:17:49 -08:00 |
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Howard Mao
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369ee74a2c
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change names of RoCC tilelink interfaces to be more sensible
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2015-12-02 16:28:23 -08:00 |
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Howard Mao
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ebf2417a32
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rocc-fpu-port merged into master for rocket
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2015-12-02 09:02:43 -08:00 |
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Howard Mao
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f67b02fadb
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Merge branch 'rocc-fpu-port'
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2015-12-02 08:52:15 -08:00 |
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Howard Mao
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73b0263663
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disconnect fpu port if no fpu-using RoCC accelerators
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2015-12-01 20:41:58 -08:00 |
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Howard Mao
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3f8f726296
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make rocc build independent from parameter structure
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2015-12-01 18:47:52 -08:00 |
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Howard Mao
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dcca0b1d86
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fix up FPU connection
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2015-12-01 18:14:58 -08:00 |
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Howard Mao
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08f77ca90d
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Merge branch 'master' into rocc-fpu-port
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2015-12-01 18:00:28 -08:00 |
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Howard Mao
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cdc476a370
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change Rocc parameterization
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2015-12-01 17:56:09 -08:00 |
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Howard Mao
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e76dfa55f7
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change the way rocc is parameterized
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2015-12-01 17:54:56 -08:00 |
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Andrew Waterman
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e0d849fec5
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Fix zscale testing
Use the following command in vsim:
make CONFIG=ZscaleConfig MODEL=ZscaleTop TB=ZscaleTestHarness run-asm-tests
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2015-12-01 17:31:48 -08:00 |
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Howard Mao
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4833d41dbc
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make the connection of FPU ports optional per accelerator
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2015-12-01 16:48:05 -08:00 |
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Andrew Waterman
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5eeb8969f6
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fix zscale build (run still fails)
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2015-12-01 16:20:34 -08:00 |
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Howard Mao
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c8c68e75bb
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base NGenerators on NTiles, not the other way around
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2015-12-01 15:26:09 -08:00 |
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Howard Mao
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0b15b19381
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add arbiter for FPU
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2015-12-01 10:22:31 -08:00 |
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Howard Mao
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1db2da00f3
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Merge branch 'master' into rocc-fpu-port
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2015-11-30 19:18:58 -08:00 |
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Howard Mao
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e4043570bd
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bump groundtest and hardfloat
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2015-11-30 18:06:15 -08:00 |
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Howard Mao
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40d68406d6
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use xlen parameter for ALU
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2015-11-30 18:04:44 -08:00 |
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Howard Mao
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e80340198a
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use implicit parameters for ALU
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2015-11-30 17:35:33 -08:00 |
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Colin Schmidt
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ec4ade988b
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[travis] add multiple configs including rocc
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2015-11-28 07:17:49 -08:00 |
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Colin Schmidt
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7259239ba4
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Merge pull request #31 from ucb-bar/multirocc
implement support for multiple RoCC accelerators
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2015-11-28 08:56:07 -05:00 |
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Colin Schmidt
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90991014a0
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Merge pull request #19 from ucb-bar/multirocc
Add support for multiple RoCC accelerators
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2015-11-28 08:56:04 -05:00 |
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Howard Mao
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7083576156
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fix typo in NastiErrorSlave
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2015-11-26 12:57:04 -08:00 |
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Howard Mao
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23f0756978
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implement support for multiple RoCC accelerators
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2015-11-26 12:49:04 -08:00 |
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Howard Mao
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9256239206
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implement support for multiple RoCC accelerators
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2015-11-26 12:46:01 -08:00 |
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Howard Mao
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58b0a86834
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some modifications to AccumulatorExample
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2015-11-26 08:48:19 -08:00 |
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Andrew Waterman
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e25a020e60
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Construct device tree ROM in MMIO region
Rebuild riscv-tools for this to work!
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2015-11-25 21:23:37 -08:00 |
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Andrew Waterman
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e52685f2e9
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Fix LoadGen zero flag
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2015-11-25 20:52:30 -08:00 |
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Andrew Waterman
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27df04354f
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Add ROM with NASTI interface
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2015-11-25 20:04:31 -08:00 |
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Andrew Waterman
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49d93da87e
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Factor out more common zscale code
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2015-11-24 19:17:21 -08:00 |
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Andrew Waterman
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e203b8b378
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Make ALU generic for zscale
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2015-11-24 19:17:07 -08:00 |
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Andrew Waterman
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52b25c3da0
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Factor out more common zscale code
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2015-11-24 18:34:03 -08:00 |
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Andrew Waterman
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5294e94794
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Remove CSR back pressure ability
We were using it for IPIs, but no longer need it.
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2015-11-24 18:28:14 -08:00 |
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Andrew Waterman
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4616db4695
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Make RegFile/ImmGen usable by zscale
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2015-11-24 18:27:07 -08:00 |
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Andrew Waterman
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1761db3272
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Factor out some common code from zscale
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2015-11-24 18:14:06 -08:00 |
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Andrew Waterman
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6d1bf5c014
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Use generic LoadGen/StoreGen
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2015-11-24 18:13:33 -08:00 |
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Andrew Waterman
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57e82442a1
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Make LoadGen and StoreGen generic
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2015-11-24 18:12:42 -08:00 |
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Howard Mao
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ec6bfde9a3
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fix WritebackUnit issue in uncore
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2015-11-21 16:11:22 -08:00 |
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Howard Mao
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ee6514e4f4
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make sure WritebackUnit sends correct probe addresses
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2015-11-21 15:55:11 -08:00 |
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Howard Mao
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04383a31f5
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Revert "make sure L2MetadataArray assigns unoccupied way if available"
This reverts commit 1857f36c1e6f2b2859c724eea6ae3cfb2618f81b.
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2015-11-21 10:35:40 -08:00 |
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Howard Mao
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158d1d870c
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do all the writes before doing the gets in GeneratorTest
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2015-11-21 09:42:00 -08:00 |
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Sagar Karandikar
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65632c875a
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Merge branch 'master' into rocc-fpu-port
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2015-11-21 02:24:38 -08:00 |
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Howard Mao
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9d50f37289
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fix unused set issue for multiple L2 cache banks
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2015-11-20 23:26:28 -08:00 |
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