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riscv
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rocket-chip
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57e82442a180f9abccec842c69b706700e4b8cd6
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Andrew Waterman
57e82442a1
Make LoadGen and StoreGen generic
2015-11-24 18:12:42 -08:00
uncore
Make LoadGen and StoreGen generic
2015-11-24 18:12:42 -08:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%