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Commit Graph

4073 Commits

Author SHA1 Message Date
Yunsup Lee
1305372ce7 refactor flush logic 2012-11-05 23:01:08 -08:00
Yunsup Lee
9844ba1c1d revamp the vector unit with the new frontend
HAVE_PVFB is still broken, we need to multi-thread the frontend
2012-11-05 01:44:02 -08:00
Yunsup Lee
ee081d1671 modify code to fix UFix := Bits error 2012-11-05 01:35:55 -08:00
Yunsup Lee
2a25307a8f revamp the vector unit with the new frontend 2012-11-05 01:35:55 -08:00
Andrew Waterman
5b20ed71be move rd=0 check into bypass logic
before, the check was in the write enable logic, but moving it obviated
an awkward corner case for mtpcr with rd=0.
2012-11-05 01:30:57 -08:00
Andrew Waterman
5e103054fd fix bug in quine mccluskey 2012-11-05 00:28:25 -08:00
Yunsup Lee
dd6ee2571d add vector vm tests 2012-11-04 19:29:56 -08:00
Andrew Waterman
0c372fc9ec refactor I$ config into RocketConfiguration 2012-11-04 17:00:19 -08:00
Andrew Waterman
e9eca6a95d refactor I$ config; remove Top class 2012-11-04 16:59:36 -08:00
Andrew Waterman
4ed2d614a2 update to new rocket; retime fpu in dc-syn 2012-11-04 16:43:02 -08:00
Andrew Waterman
7380c9fe60 aggressively clock gate int and fp datapaths 2012-11-04 16:40:14 -08:00
Andrew Waterman
bd2d61de03 use 8T SRAM for I$; gate clock more aggressively 2012-11-04 16:39:25 -08:00
Andrew Waterman
fedee6c67d add generic error correcting codes 2012-10-30 01:03:47 -07:00
Henry Cook
0cd0f8a9db Initial version of migratory protocol 2012-10-23 18:01:53 -07:00
Henry Cook
538b23c223 Initial version of using sbt tasks to elaborate chisel source and invoke backends' makefiles 2012-10-23 12:52:59 -07:00
Henry Cook
17d2bd8926 Initial version of sbt tasks (elaborate task with no parameters) 2012-10-23 12:52:00 -07:00
Yunsup Lee
3edc1f42aa revamp the backup memory link in the vlsi backend 2012-10-23 03:31:34 -07:00
Andrew Waterman
367b5489d1 first crack at continuous compilation/testing flow
try it out: cd emulator; make test
2012-10-19 04:09:07 -07:00
Andrew Waterman
1ad928cfe2 directly integrate dramsim build
also, build it as a static library to simplify dependencies
2012-10-18 18:59:37 -07:00
Andrew Waterman
edf0eeed01 integrate updated rocket/uncore 2012-10-18 17:51:41 -07:00
Andrew Waterman
5773cbb68a rejigger htif to use UncoreConfiguration 2012-10-18 17:26:03 -07:00
Andrew Waterman
2aecb0024f UncoreConfiguration now contains coherence policy 2012-10-18 16:57:28 -07:00
Andrew Waterman
ffda0e41a9 parameterize width of MemSerdes/MemDesser 2012-10-18 16:56:36 -07:00
Henry Cook
e2eb7ce8e9 Cleanup git incompetence 2012-10-16 16:54:58 -07:00
Henry Cook
88ac5af181 Merged consts-as-traits 2012-10-16 16:32:35 -07:00
Henry Cook
9df5cfa552 Factored out tilelink classes 2012-10-16 14:26:33 -07:00
Henry Cook
6cff1c13d8 Refer to traits moved to uncore, add UncoreConfiguration to top 2012-10-16 14:22:23 -07:00
Henry Cook
8509cda813 Refined traits for use with rocket asserts, added UncoreConfiguration to handle ntiles 2012-10-16 13:58:18 -07:00
Miquel Moreto
6d49dc51a0 Fixed emulator Makefile + extra info in the README file 2012-10-16 11:06:48 -07:00
Andrew Waterman
b9a2af697d turn off HAVE_VEC as it's currently broken
the new I$/frontend needs to be integrated
2012-10-16 07:38:19 -07:00
Andrew Waterman
0a640f2cc6 make DecodeLogic deterministic (hopefully) 2012-10-16 04:51:21 -07:00
Andrew Waterman
5821900329 don't refetch from I$ if on same 16B block 2012-10-16 02:24:38 -07:00
Andrew Waterman
b955985b38 improve divider QoR 2012-10-16 02:24:38 -07:00
Andrew Waterman
197154c485 use BTB for JALR 2012-10-16 02:24:37 -07:00
Andrew Waterman
fc648d13a1 remove old Mux1H; add implicit conversions 2012-10-16 02:24:37 -07:00
Andrew Waterman
661f8e635b merge I$, ITLB, BTB into Frontend 2012-10-16 02:24:37 -07:00
Andrew Waterman
fcd69dba98 add optional early-out to mul/div 2012-10-16 02:24:37 -07:00
Andrew Waterman
27ddff1adb simplify and improve multiplier 2012-10-16 02:24:37 -07:00
Henry Cook
1418604bf0 new constants organization 2012-10-15 18:52:48 -07:00
Henry Cook
8970b635b2 improvements to implicit RocketConfiguration parameter 2012-10-15 16:29:49 -07:00
Henry Cook
a7a4e65690 Initial verison of reading config from files 2012-10-15 16:05:50 -07:00
Henry Cook
5d2a470215 all rocket-specific arbiters in one file and refactored traits slightly 2012-10-15 16:05:32 -07:00
Miquel Moreto
aa3dc422b4 Added first README file 2012-10-15 10:54:47 -07:00
Miquel Moreto
5d75ddc553 Added dramsim2 memory model to the emulator backend 2012-10-14 14:06:28 -07:00
Yunsup Lee
34da073077 fix tab 2012-10-11 12:09:49 -07:00
Huy Vo
f67f8829e3 new rocket + uncore tags, added uncore dependencies to Makefrag 2012-10-10 15:44:19 -07:00
Huy Vo
08ab076217 forgot to change package + using fromBits in memserdes instead of manual unpacking 2012-10-10 15:42:39 -07:00
Huy Vo
1864e41361 memserdes + slowio out of rocket and into uncore 2012-10-10 15:25:24 -07:00
Huy Vo
9610622ab0 moving memserdes + slowio into src 2012-10-10 12:41:11 -07:00
Huy Vo
35f213e735 Merge branch 'master' of ../rocket-clone 2012-10-10 12:39:48 -07:00