directly integrate dramsim build
also, build it as a static library to simplify dependencies
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parent
edf0eeed01
commit
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8
README
8
README
@ -26,19 +26,11 @@ BUILDING THE TOOLCHAIN:
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cd riscv-asmtests-bmarks/riscv-bmarks/
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make
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To build dramsim2 (tagged version 2.1):
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cd dramsim2/
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git checkout v2.1
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make libdramsim.so
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BUILDING THE PROJECT:
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To build the C simulator:
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cd emulator
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make dramsim2 (if DRAMSim2 is not installed and in your path)
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make
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To build the VCS simulator:
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1
emulator/.gitignore
vendored
1
emulator/.gitignore
vendored
@ -1,5 +1,6 @@
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*~
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*.o
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*.a
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*.out
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*.vcd
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*.vpd
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@ -7,17 +7,16 @@ CXXFLAGS := -O1
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all: emulator
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CXXSRCS := emulator disasm
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CXXFLAGS := $(CXXFLAGS) -Itestbench -I$(basedir)/chisel/csrc
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CXXFLAGS := $(CXXFLAGS) -Itestbench -I$(basedir)/chisel/csrc -I../dramsim2
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DRAMSIM2_PATH := ../dramsim2/
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CXXFLAGS := $(CXXFLAGS) -I$(DRAMSIM2_PATH) -L$(DRAMSIM2_PATH) -ldramsim -Wl,-rpath=$(DRAMSIM2_PATH)
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DRAMSIM2_LIB := libdramsim.so
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OBJS := $(addsuffix .o,$(CXXSRCS) $(MODEL))
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DEBUG_OBJS := $(addsuffix -debug.o,$(CXXSRCS) $(MODEL))
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generated-src/$(MODEL).cpp: $(basedir)/riscv-rocket/src/*.scala $(basedir)/riscv-hwacha/src/*.scala $(basedir)/chisel/src/main/scala/* $(basedir)/uncore/src/*.scala
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cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.Top --backend c --noIoDebug --targetDir ../emulator/generated-src"
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cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.$(MODEL) --backend c --noIoDebug --targetDir ../emulator/generated-src"
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generated-src-debug/$(MODEL).cpp: $(basedir)/riscv-rocket/src/*.scala $(basedir)/riscv-hwacha/src/*.scala $(basedir)/chisel/src/main/scala/* $(basedir)/uncore/src/*.scala
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cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.Top --backend c --debug --vcd --targetDir ../emulator/generated-src-debug"
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cd $(basedir)/sbt && $(SBT) "project referencechip" "run ReferenceChip.$(MODEL) --backend c --debug --vcd --targetDir ../emulator/generated-src-debug"
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$(MODEL).o: %.o: generated-src/%.cpp
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$(CXX) $(CXXFLAGS) -Igenerated-src -c -o $@ $<
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@ -31,14 +30,17 @@ $(addsuffix .o,$(CXXSRCS)): %.o: testbench/%.cc testbench/* generated-src/$(MODE
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$(addsuffix -debug.o,$(CXXSRCS)): %-debug.o: testbench/%.cc testbench/* generated-src-debug/$(MODEL).cpp
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$(CXX) $(CXXFLAGS) -Igenerated-src-debug -c -o $@ $<
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emulator: $(addsuffix .o,$(CXXSRCS)) $(MODEL).o
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$(CXX) $(CXXFLAGS) -o $@ $^
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DRAMSIM_OBJS := $(patsubst %.cpp,%.o,$(wildcard ../dramsim2/*.cpp))
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$(DRAMSIM_OBJS): %.o: %.cpp
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$(CXX) $(CXXFLAGS) -DNO_STORAGE -Dmain=nomain -c -o $@ $<
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libdramsim.a: $(DRAMSIM_OBJS)
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ar rcs $@ $^
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emulator-debug: $(addsuffix -debug.o,$(CXXSRCS)) $(MODEL)-debug.o
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$(CXX) $(CXXFLAGS) -o $@ $^
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emulator: $(OBJS) libdramsim.a
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$(CXX) $(CXXFLAGS) -o $@ $(OBJS) -L. -ldramsim
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dramsim2:
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cd $(DRAMSIM2_PATH) ; make $(DRAMSIM2_LIB)
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emulator-debug: $(DEBUG_OBJS) libdramsim.a
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$(CXX) $(CXXFLAGS) -o $@ $(DEBUG_OBJS) -L. -ldramsim
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all: emulator
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