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riscv
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rocket-chip
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fcd69dba988798e9e2f7c2057bc2671c1f13cf5f
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Andrew Waterman
fcd69dba98
add optional early-out to mul/div
2012-10-16 02:24:37 -07:00
rocket/src/main
/scala
add optional early-out to mul/div
2012-10-16 02:24:37 -07:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%