Andrew Waterman
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628745226c
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Use spike disassembler riscv-dis if it exists
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2013-09-15 04:25:53 -07:00 |
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Andrew Waterman
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80003b3019
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Support RoCC
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2013-09-15 04:25:26 -07:00 |
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Andrew Waterman
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fbdbb01232
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update to new isa; disable vector tests
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2013-09-12 17:04:03 -07:00 |
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Andrew Waterman
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cc7783404d
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Add memory command M_XA_XOR
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2013-09-12 16:09:53 -07:00 |
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Henry Cook
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b42e140e05
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NetworkIOs no longer use thunks
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2013-09-10 16:23:52 -07:00 |
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Henry Cook
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1cac26fd76
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NetworkIOs no longer use thunks
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2013-09-10 16:15:41 -07:00 |
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Henry Cook
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ee98cd8378
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new enum syntax
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2013-09-10 10:54:51 -07:00 |
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Stephen Twigg
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6cde69e95d
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Merge changes from master. This updates rocket more than it should so while the emulator builds, programs will not execute correctly due to ISA changes, etc.
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2013-09-09 14:31:18 -07:00 |
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Stephen Twigg
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e23e8e3850
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Merge branch 'master' into chisel-v2
Conflicts:
src/main/scala/memserdes.scala
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2013-09-05 16:17:34 -07:00 |
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Stephen Twigg
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f27c0fb010
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Merge commit '2bd4a66eee572252ba6250f9bddada51657fc379' into chisel-v2
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2013-09-05 15:01:56 -07:00 |
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Stephen Twigg
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69daae0dae
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Add dependency resolvers to build.scala to fix build script
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2013-09-05 14:56:41 -07:00 |
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Yunsup Lee
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2c47b4388a
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push rocket
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2013-08-26 14:54:49 -07:00 |
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Yunsup Lee
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9003bc2614
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push rocket
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2013-08-24 22:42:57 -07:00 |
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Yunsup Lee
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d0674af13f
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forgot to push riscv-rocket
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2013-08-24 22:15:38 -07:00 |
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Yunsup Lee
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ba9bbc27df
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apply same change to fpga top-level
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2013-08-24 15:50:03 -07:00 |
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Yunsup Lee
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76cd90fc01
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parameterize number of SCRs
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2013-08-24 15:47:42 -07:00 |
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Yunsup Lee
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694ebd65cf
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push uncore
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2013-08-24 15:24:25 -07:00 |
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Yunsup Lee
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b01fe4f6aa
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fix memserdes bit ordering
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2013-08-24 15:24:17 -07:00 |
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Yunsup Lee
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0884bc9789
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fix DRAMSideLLCNull entries
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2013-08-24 13:20:38 -07:00 |
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Yunsup Lee
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1e3ac0afa9
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back to NTILES=1
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2013-08-24 13:10:30 -07:00 |
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Henry Cook
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9aff60f340
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whitespace error in build.sbt
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2013-08-21 16:16:42 -07:00 |
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Henry Cook
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dc53529156
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added resolver, bumped chisel dependency
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2013-08-21 16:00:51 -07:00 |
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Henry Cook
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6aa500fc16
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dont make assumptions about default project name when invoking sbt
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2013-08-20 12:56:01 -07:00 |
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Henry Cook
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b06d33da2f
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Canonicalized sbt, updated makefiles, cleaned up submodules, minor bugfixes
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2013-08-19 19:54:41 -07:00 |
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Henry Cook
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85e5ce046f
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pulled submodule commits, uncore sbt standardized
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2013-08-15 17:07:13 -07:00 |
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Henry Cook
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6b20556661
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Merge branch 'chisel-v2' of github.com:ucb-bar/reference-chip into chisel-v2
Conflicts:
chisel
riscv-hwacha
riscv-rocket
uncore
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2013-08-15 16:39:30 -07:00 |
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Henry Cook
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784e017bae
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Final Reg standardization
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2013-08-15 16:37:58 -07:00 |
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Henry Cook
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b80f45f8f2
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Merge branch 'chisel-v2' of github.com:ucb-bar/uncore into chisel-v2
Conflicts:
src/main/scala/llc.scala
src/main/scala/slowio.scala
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2013-08-15 16:22:12 -07:00 |
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Henry Cook
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3763cd0004
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standardizing sbt build conventions
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2013-08-15 15:57:16 -07:00 |
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Henry Cook
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17d404b325
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final Reg changes
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2013-08-15 15:27:38 -07:00 |
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Henry Cook
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9b70ecf546
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Reg standardization
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2013-08-13 17:53:19 -07:00 |
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Henry Cook
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1308c08baa
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Reg standardization
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2013-08-13 17:52:53 -07:00 |
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Henry Cook
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7ff4126d04
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Abstracted UncachedTileLinkIOArbiters
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2013-08-13 00:01:11 -07:00 |
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Henry Cook
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9162fbc9b5
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Clean up cloning in tilelink bundles
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2013-08-12 23:15:54 -07:00 |
|
Huy Vo
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d7d13255db
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chisel tag
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2013-08-12 20:53:29 -07:00 |
|
Huy Vo
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f9d1403a92
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tags
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2013-08-12 20:53:17 -07:00 |
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Huy Vo
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cc6631ae4d
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reset -> _reset
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2013-08-12 20:52:55 -07:00 |
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Huy Vo
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d5c9eb0f54
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reset -> resetVal, getReset -> reset
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2013-08-12 20:52:18 -07:00 |
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Henry Cook
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11e131af47
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initial attempt at upgrade
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2013-08-12 10:46:22 -07:00 |
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Henry Cook
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5c7a1f5cd6
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initial attempt at upgrade
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2013-08-12 10:36:44 -07:00 |
|
Henry Cook
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199e76fc77
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Fold uncore constants into TileLinkConfiguration, update coherence API
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2013-08-02 16:31:27 -07:00 |
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Henry Cook
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bc2b45da12
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Fold uncore constants into TileLinkConfiguration, update coherence API
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2013-08-02 14:55:06 -07:00 |
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Stephen Twigg
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c1b1a21a0f
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If +stats is set when running simv-debug, will only output vcd data when cr28 is high.
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2013-07-30 16:39:47 -07:00 |
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Henry Cook
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4d916b56e3
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Bump scala to 2.10.2, sbt to 0.13-RC2, including new launcher. Upgrade reflection in network.scala to 2.10 lib. Constants now obtained from subproject package objects. Give network its own file.
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2013-07-24 23:28:43 -07:00 |
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Henry Cook
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d8440b042a
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Make compatible with scala 2.10. Refactor constants into package object. Remove networking primitives from package object. Clean up request generators. Chnage ++ to +: for appending to io.incoherent.
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2013-07-24 23:22:36 -07:00 |
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Stephen Twigg
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3f874342a4
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Update chisel to appropriate version for reference chip build.
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2013-07-10 17:08:56 -07:00 |
|
Ben Keller
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c7bf1aaac9
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Merge branch 'master' of github.com:ucb-bar/reference-chip
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2013-07-10 16:01:25 -07:00 |
|
Ben Keller
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a72e0dc99e
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Updated riscv-tools reference
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2013-07-10 16:01:01 -07:00 |
|
Henry Cook
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2796de01bf
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new tilelink arbiter types, reduced release xact trackers
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2013-07-09 15:41:27 -07:00 |
|
Henry Cook
|
db8e5fda9b
|
new tilelink arbiter types, reduced release xact trackers
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2013-07-09 15:37:42 -07:00 |
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