riscv/rocket-chip
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Author SHA1 Message Date
Howard Mao 55581195eb add groundtest submodule for simple memory testing 2015-11-11 14:33:02 -08:00
Howard Mao 149480411e make sure ClientTileLinkEnqueuer uses the correct parameters 2015-11-10 16:09:19 -08:00
Howard Mao b59ce5fed4 make sure L2 waits for outer grant before sending grant for write request 2015-11-10 16:06:14 -08:00
Howard Mao 51f128ec74 actually use backendBuffering in front of unwrapper/converter chain 2015-11-09 11:50:18 -08:00
Howard Mao 42d3d09d7a add a ClientTileLinkEnqueuer to complement the TileLinkEnqueuer 2015-11-09 11:49:19 -08:00
Howard Mao 7942be4e01 make sure outerTL method is idempotent 2015-11-09 11:10:02 -08:00
Henry Cook e3efc09b5b remove unnecessary UInt encode/decode on releaseMatches path 2015-11-05 17:20:03 -08:00
Yunsup Lee 1e772daeea no spaces in Makefrag 2015-11-05 16:42:05 -08:00
Howard Mao cb0c2df051 update fpga-zynq 2015-11-05 10:50:13 -08:00
Howard Mao 42e7067400 bump uncore 2015-11-05 10:49:25 -08:00
Howard Mao bbf14ddc01 use definitions in consts header whenever possible 2015-11-05 10:48:32 -08:00
Howard Mao fb501e75c0 fixes for sub-block TL requests in uncore 2015-11-05 10:48:32 -08:00
Howard Mao 7b252d8f89 get rid of now-unnecessary bits in MIF tag 2015-11-05 10:48:32 -08:00
Howard Mao ba5a6af05c correctly stripe data across memory channels in simulation 2015-11-05 10:48:32 -08:00
Sagar Karandikar ee9195be26 rename NBANKS knob to NBANKS_PER_MEM_CHANNEL for clarity 2015-11-05 10:48:32 -08:00
Sagar Karandikar 354abf5e6b fix NSets calculation 2015-11-05 10:48:32 -08:00
Howard Mao dcef020ca0 get multichannel simulation working in emulator 2015-11-05 10:48:32 -08:00
Howard Mao 04d92dddbd add back decoupled NASTI connection at edge of RocketChip 2015-11-05 10:48:32 -08:00
Yunsup Lee 51116e0674 add 2 and 4 memory channel configs 2015-11-05 10:48:32 -08:00
Yunsup Lee 0d245741bc add multichannel NASTI support in Verilog testbench 2015-11-05 10:48:32 -08:00
Howard Mao 9dabcab9c2 Get rid of MemIO in Top and replace with AXI throughout 2015-11-05 10:48:32 -08:00
Henry Cook 3698153535 OHToUInt instead of PriorityEncoder on Acq/RelMatches signals in L2Bank 2015-11-03 14:31:35 -08:00
Howard Mao baa2544651 Fix some more issues with narrower 2015-10-31 19:36:30 -07:00
Howard Mao 812c5bcc55 make sure narrower can handle sub-block level requests correctly 2015-10-31 15:58:36 -07:00
Howard Mao d4b8653002 fix too strict assertion in broadcast hub 2015-10-31 15:58:10 -07:00
Colin Schmidt 032bdd0601 Merge pull request #24 from ucb-bar/regression-master 
Add a "--master" flag to the regression script
 2015-10-29 14:15:44 -07:00
Palmer Dabbelt 3d2a4ffdd6 Add a "--master" flag to the regression script 
I want to be able to test the master of riscv-gnu-toolchain against the current
RTL as part of the buildbot.  This flag takes a list of repositories (by their
submodule path) and updates those to the current master, which facilitates that
check.
 2015-10-29 14:11:26 -07:00
Howard Mao c10870a87c make sure ID width requirement in TL -> NASTI converter is correct 2015-10-27 13:25:29 -07:00
Howard Mao eb62ff6a50 add queues between Nasti -> TL converter and Nasti interconnect 2015-10-26 14:15:25 -07:00
Howard Mao f37938e4de implement MultiChannel routing 2015-10-26 14:15:25 -07:00
Howard Mao 9fa4541916 get rid of unused full signal in ReorderQueue 2015-10-26 12:17:25 -07:00
Yunsup Lee a175afae73 make ZscaleChip work with new parameters framework 2015-10-25 10:24:39 -07:00
Howard Mao c3a7dcf0ab fix missing cde library dependencies in submodules 2015-10-23 15:05:19 -07:00
Colin Schmidt 854feab08e add knob and constraint dumping 2015-10-22 17:25:38 -07:00
Howard Mao 6403f27fbe fix bug in ReorderQueue breaking TileLink Unwrapper 2015-10-22 15:52:55 -07:00
Jim Lawson 4c2b0a9032 Add ability to generate libraryDependency on cde. 2015-10-22 09:57:02 -07:00
Henry Cook 9769b2747c now depend on external cde library rather than chisel.params (bump all submodules) 2015-10-21 18:24:16 -07:00
Henry Cook 47bc193c16 added CDE library as submodule 2015-10-21 18:24:16 -07:00
Henry Cook f8594da1d3 depend on external cde library 2015-10-21 18:17:17 -07:00
Howard Mao 21f342ad42 fix typo causing L2 cache configuration to fail 2015-10-21 13:37:33 -07:00
Howard Mao 02d113b39f outerDataBits / innerDataBits should be per beat, not per block 2015-10-21 11:31:13 -07:00
Howard Mao d5a75fd113 accidentally committed some code I didn't mean to in Rocket 2015-10-21 09:21:54 -07:00
Howard Mao 693a4ae00e fix some more memory system bugs 2015-10-20 23:29:59 -07:00
Howard Mao baf95533a4 fix combinational loop in TileLink Unwrapper 2015-10-20 23:26:11 -07:00
Howard Mao ffe7df2fed make sure TL -> NASTI converter acquire ready not dependent on valid 2015-10-20 22:09:22 -07:00
Howard Mao c311c9938e nitpicky declaration move 2015-10-20 21:10:54 -07:00
Howard Mao 1c135c1628 fix ready-valid mixup in TileLink unwrapper 2015-10-20 21:07:42 -07:00
Henry Cook 62765e9609 L2 rowBits param bugfix 2015-10-20 18:57:19 -07:00
Henry Cook 3fc630405b Vectorize RoCC and Tile memory interfaces (bump uncore, rocket, zscale) 2015-10-20 15:05:12 -07:00
Henry Cook 4389b9edb0 tilelink parameter tweak: addrBits now a constant 2015-10-20 15:00:30 -07:00