riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

fix NSets calculation

Browse Source
This commit is contained in:
Sagar Karandikar 2015-11-04 22:15:47 -08:00 committed by Howard Mao
parent dcef020ca0
commit 354abf5e6b
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/main/scala/Configs.scala
View File

@ -206,7 +206,7 @@ class WithL2Cache extends Config(
case "L2Bank" => {
case NSets => (((here[Int]("L2_CAPACITY_IN_KB")*1024) /
site(CacheBlockBytes)) /
site(NBanksPerMemoryChannel)*site(NMemoryChannels)) /
(site(NBanksPerMemoryChannel)*site(NMemoryChannels))) /
site(NWays)
case NWays => Knob("L2_WAYS")
case RowBits => site(TLKey(site(TLId))).dataBitsPerBeat