Henry Cook
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a39080d0b1
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Fixed abort bug: xact_abort.ready was not pinned high
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2012-04-24 17:16:40 -07:00 |
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Andrew Waterman
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fb4408b150
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fix AMO replay/coherence deadlock
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2012-04-15 22:56:02 -07:00 |
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Andrew Waterman
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724735f13f
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fix writeback bug
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2012-04-13 03:16:48 -07:00 |
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Andrew Waterman
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00d934cfac
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fix coherence bugs in cache
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2012-04-12 21:57:37 -07:00 |
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Andrew Waterman
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c0ec3794bf
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coherence mostly works now
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2012-04-10 02:22:45 -07:00 |
|
Henry Cook
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3cdd166153
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Refactored coherence as member rather than trait. MI and MEI protocols.
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2012-04-10 00:09:58 -07:00 |
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Henry Cook
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0b4937f70f
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changed coherence message type names
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2012-04-09 23:29:31 -07:00 |
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Henry Cook
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ed79ec98f7
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Refactored coherence better from uncore hub, better coherence function names
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2012-04-09 23:29:31 -07:00 |
|
Yunsup Lee
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1cddd5de56
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fix amo locking up problem
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2012-03-20 02:16:28 -07:00 |
|
Yunsup Lee
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264732556f
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fixes to match verilog X semantics
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2012-03-19 03:10:00 -07:00 |
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Andrew Waterman
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cfca2d1411
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clean up cache interfaces; avoid reserved keywords
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2012-03-16 00:44:16 -07:00 |
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Andrew Waterman
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820884c7e6
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fix probes for smaller cache sizes
address bits (pgidx_bits-1,taglsb) were omitted from tag checks.
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2012-03-15 23:08:30 -07:00 |
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Andrew Waterman
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4684171ac6
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fix fence.i for associative caches
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2012-03-15 21:23:21 -07:00 |
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Andrew Waterman
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7dde7099d2
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use broadcast hub and coherent HTIF
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2012-03-14 16:44:35 -07:00 |
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Andrew Waterman
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1492457df5
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add probe replies to HTIF
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2012-03-13 16:56:47 -07:00 |
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Andrew Waterman
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b0f798962c
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add probe unit
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2012-03-13 16:43:51 -07:00 |
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Henry Cook
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287bc1c262
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Further refinement of tag_match/tag_hit signals
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2012-03-13 11:48:12 -07:00 |
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Andrew Waterman
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d76b05bde1
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fix way selection on D$ write upgrades
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2012-03-13 02:21:02 -07:00 |
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Henry Cook
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6229a33dc4
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fixed cache controller flush unit deadlock
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2012-03-12 22:01:52 -07:00 |
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Andrew Waterman
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8ffdac9526
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fix D$ store-upgrade bug
loads to the same address as stores that cause an upgrade
could return the old value
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2012-03-10 15:50:10 -08:00 |
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Andrew Waterman
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e3a68848e0
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fix D$ critical paths and fix verilog build
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2012-03-09 20:02:51 -08:00 |
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Henry Cook
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e591d83e91
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Fixed global_xact_id propagation bug
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2012-03-09 11:05:44 -08:00 |
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Andrew Waterman
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766bac88f8
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refactor D$ writebacks and flushes
MSHRs now arbitrate for writebacks and handle flushes.
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2012-03-09 02:55:46 -08:00 |
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Andrew Waterman
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5a7c5772a8
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clearly distinguish PPN and cache tag
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2012-03-07 23:11:17 -08:00 |
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Andrew Waterman
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c09eeb7fd2
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fix D$ next-state logic
it was using the CPU command from the wrong pipeline stage,
which was a don't-care with ThreeStateIncoherence.
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2012-03-07 01:42:08 -08:00 |
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Andrew Waterman
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a0c9452b86
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change D$ to use FourStateCoherence protocol
instead of ThreeStateIncoherence.
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2012-03-07 01:26:35 -08:00 |
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Andrew Waterman
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6e16b04ada
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implement transaction finish messages
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2012-03-06 15:48:08 -08:00 |
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Andrew Waterman
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5f33ab24b0
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fix merge conflict
oops :(
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2012-03-06 02:02:53 -08:00 |
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Andrew Waterman
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5f12990dfb
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support memory transaction aborts
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2012-03-06 00:35:02 -08:00 |
|
Henry Cook
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1b3307df32
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Removed has_data fields from all coherence messages, increased message type names to compensate
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2012-03-02 23:51:53 -08:00 |
|
Henry Cook
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35f97bf858
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Filled out 4 state coherence functions for cache
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2012-03-02 21:58:50 -08:00 |
|
Yunsup Lee
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8678b3d70c
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clean up ioDecoupled/ioPipe interface
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2012-03-01 20:48:46 -08:00 |
|
Andrew Waterman
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6d03d75835
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improve D$ internal interfaces
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2012-03-01 20:20:15 -08:00 |
|
Andrew Waterman
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28cacd953f
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D$ cleanup - merge ReplayUnit and MSHRFile
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2012-03-01 19:30:56 -08:00 |
|
Andrew Waterman
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52101373e0
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clean up D$ store data unit
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2012-03-01 19:20:00 -08:00 |
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Andrew Waterman
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c38065d0e8
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clean up priority encoders
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2012-02-29 16:13:14 -08:00 |
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Andrew Waterman
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012da6002e
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replace tile memory interface with ioTileLink
work in progress towards coherent HTIF. for now, requests
are incoherently passed through a null coherence hub.
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2012-02-29 03:10:47 -08:00 |
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Andrew Waterman
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c99f6bbeb7
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separate memory request command and data
also, merge some VLSI/C++ test harness functionality
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2012-02-28 19:06:23 -08:00 |
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Andrew Waterman
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2b1c07c723
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replace ioDCache with ioMem
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2012-02-27 18:36:09 -08:00 |
|
Yunsup Lee
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bfd0ae125e
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upgrade to new rocket/vu memory interface, fix amo nack bug in hellacache
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2012-02-26 23:46:51 -08:00 |
|
Andrew Waterman
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6e706c7c74
|
fix yet another AMO-related replay bug
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2012-02-26 20:20:45 -08:00 |
|
Huy Vo
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5b0f7ccf68
|
updating rocket code to lastest version of chisel, passes assembly tests in C++ and Verilog as long as you dont use the vector unit
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2012-02-26 17:24:08 -08:00 |
|
Yunsup Lee
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94ba32bbd3
|
change package name and sbt project name to rocket
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2012-02-25 17:09:26 -08:00 |
|
Andrew Waterman
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7b3cce79e3
|
allocate a primary miss on a prefetch
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2012-02-23 22:40:24 -08:00 |
|
Andrew Waterman
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3eebf40310
|
nack CPU requests during any replay
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2012-02-22 18:37:13 -08:00 |
|
Andrew Waterman
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c8f768c8b3
|
fix AMO replay bug
like the recent AMO bug fix, but affects stores too. oops.
|
2012-02-21 14:39:54 -08:00 |
|
Andrew Waterman
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d5608b2728
|
fix AMO replay bug
didn't check for structural hazard on AMO unit
if a replay was initiated one cycle before before
a hit-under-miss AMO was issued
|
2012-02-21 01:02:16 -08:00 |
|
Henry Cook
|
d46e59a16d
|
Abstract base nbcache class
|
2012-02-16 12:34:51 -08:00 |
|
Henry Cook
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124efe5281
|
Replace nbcache manipulation of meta state bits with abstracted functions
|
2012-02-16 10:43:40 -08:00 |
|
Henry Cook
|
0671a99712
|
NBcache works with associativities other than powers of 2
|
2012-02-13 21:44:32 -08:00 |
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