Henry Cook
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05b5188ad9
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meta and data bundle refactor
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2014-11-19 15:55:25 -08:00 |
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Henry Cook
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a519a43f23
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Merge branch 'master' into new-llc
Conflicts:
src/main/scala/coherence.scala
src/main/scala/memserdes.scala
src/main/scala/tilelink.scala
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2014-11-12 16:25:25 -08:00 |
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Henry Cook
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cb7e712599
|
Added uncached write data queue to coherence hub
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2014-11-12 12:55:07 -08:00 |
|
Henry Cook
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82155f333e
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Major tilelink revision for uncached message types
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2014-11-11 17:36:55 -08:00 |
|
Henry Cook
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35553cc0b7
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NullDirectory sharers.count fix
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2014-11-11 16:05:25 -08:00 |
|
Henry Cook
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10309849b7
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Remove master_xact_id from Probe and Release
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2014-11-06 12:07:33 -08:00 |
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Henry Cook
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27c72e5eed
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nearly all isa tests pass
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2014-10-23 21:50:03 -07:00 |
|
Henry Cook
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a891ba1d46
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more correct handling of internal state
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2014-10-21 17:40:30 -07:00 |
|
Henry Cook
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044b19dbc1
|
Compiles and elaborates, does not pass asm tests
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2014-10-15 11:46:35 -07:00 |
|
Henry Cook
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86bdbd6535
|
new tshrs, compiles but does not elaborate
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2014-10-07 22:33:10 -07:00 |
|
Henry Cook
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394eb38a96
|
temp; converted voluntary wb tracker
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2014-10-03 01:06:49 -07:00 |
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Henry Cook
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dc1a61264d
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initial version, acts like old hub
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2014-10-03 01:06:49 -07:00 |
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Henry Cook
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d735f64110
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Parameter API update
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2014-10-02 16:47:35 -07:00 |
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Henry Cook
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7571695320
|
Removed broken or unfinished modules, new MemPipeIO converter
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2014-09-24 15:11:24 -07:00 |
|
Henry Cook
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82fe22f958
|
support for multiple tilelink paramerterizations in same design
Conflicts:
src/main/scala/cache.scala
|
2014-09-24 11:30:40 -07:00 |
|
Henry Cook
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53b8d7b031
|
use new coherence methods in l2, ready to query dir logic
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2014-09-20 18:01:14 -07:00 |
|
Henry Cook
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149d51d644
|
more coherence API cleanup
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2014-09-20 16:57:13 -07:00 |
|
Henry Cook
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faed47d131
|
use thunk for dir info
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2014-09-20 16:54:28 -07:00 |
|
Henry Cook
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f7b1e23ead
|
functional style on MuxBundle
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2014-09-20 16:54:28 -07:00 |
|
Yunsup Lee
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f249da1803
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update README
|
2014-09-17 11:25:14 -07:00 |
|
Yunsup Lee
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49b027db2c
|
forgot to add LICENSE file
|
2014-09-12 15:36:29 -07:00 |
|
Yunsup Lee
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0b51d70bd2
|
add LICENSE
|
2014-09-12 15:31:38 -07:00 |
|
Yunsup Lee
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f8d450b4e2
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mark DRAMSideLLC as HasKnownBug
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2014-09-11 22:06:03 -07:00 |
|
Henry Cook
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5e26b4ab66
|
Merge branch 'dse'
Conflicts:
src/main/scala/htif.scala
src/main/scala/llc.scala
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2014-09-06 06:16:58 -07:00 |
|
Scott Beamer
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f8821b4cc9
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better fix with explanation of sbt issue
|
2014-09-02 15:16:03 -07:00 |
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Scott Beamer
|
bfb662968d
|
fixes sbt error during first run
|
2014-09-02 14:33:58 -07:00 |
|
Henry Cook
|
712f3a754d
|
merge in master
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2014-09-02 12:34:42 -07:00 |
|
Henry Cook
|
17b2359c9a
|
htif parameters trait
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2014-08-24 19:27:58 -07:00 |
|
Henry Cook
|
dc5643b12f
|
Final parameter refactor.
|
2014-08-23 01:19:36 -07:00 |
|
Scott Beamer
|
e384b33cc3
|
don't generate a write mask for BigMem if it isn't used
not needed for llc data
|
2014-08-19 15:50:20 -07:00 |
|
Henry Cook
|
e26f8a6f6a
|
Fix errors in derived cache params
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2014-08-12 14:55:44 -07:00 |
|
Henry Cook
|
9ab3a4262c
|
Cache utility traits. Completely compiles, asm tests hang.
|
2014-08-11 18:35:49 -07:00 |
|
Henry Cook
|
f411fdcce3
|
Full conversion to params. Compiles but does not elaborate.
|
2014-08-08 12:21:57 -07:00 |
|
Jim Lawson
|
0020ded367
|
Replace needWidth() with getWidth.
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2014-06-13 14:53:48 -07:00 |
|
Jim Lawson
|
a04ef4f5f4
|
Quick change to work with new Width class.
Replace .width with .needWidth()
|
2014-06-13 11:44:43 -07:00 |
|
Andrew Waterman
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1ae7a9376c
|
Fix unhandled LLC writeback hazard
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2014-06-13 03:25:52 -07:00 |
|
Henry Cook
|
3c329df7e7
|
refactor Metadata, clean and expand coherence API
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2014-05-28 13:35:08 -07:00 |
|
Andrew Waterman
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364a6de214
|
Use Mem instead of Vec[Reg]
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2014-05-18 19:26:35 -07:00 |
|
Henry Cook
|
0e39346a12
|
L2-specific metadataarray wrapper, hookups to tshrfile
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2014-05-07 01:51:46 -07:00 |
|
Henry Cook
|
bc3ef1011e
|
correct use of function value to initialize MetaDataArray
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2014-05-06 12:59:45 -07:00 |
|
Henry Cook
|
45172f1f37
|
parameterize metadataarray
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2014-05-01 01:44:59 -07:00 |
|
Henry Cook
|
0237229921
|
client/master -> inner/outer
|
2014-04-29 16:49:18 -07:00 |
|
Henry Cook
|
52c6de5641
|
DRAMSideLLCLike trait. TSHRFile. New L2 config objects.
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2014-04-26 19:11:36 -07:00 |
|
Henry Cook
|
1163131d1e
|
TileLinkIO.GrantAck -> TileLinkIO.Finish
|
2014-04-26 15:17:05 -07:00 |
|
Henry Cook
|
3f53d532c2
|
uniquify tilelink conf val name for easier subtyping
|
2014-04-26 14:58:38 -07:00 |
|
Henry Cook
|
f8f29c69b8
|
MetaData & friends moved to uncore/
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2014-04-23 16:24:20 -07:00 |
|
Henry Cook
|
39681303b8
|
beginning of l2 cache
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2014-04-22 16:58:15 -07:00 |
|
Henry Cook
|
5613dc7d1b
|
replaced Lists with Vecs
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2014-04-18 17:26:56 -07:00 |
|
Jim Lawson
|
bf2ff7804e
|
Add chisel-dependent.sbt for -DchiselVersion="latest.release"
If -DchiselVersion is specified on the command line, add the
appropriate chisel library to libraryDependencies.
|
2014-04-17 17:01:40 -07:00 |
|
Henry Cook
|
b1df49ba30
|
removed AddressSpaceConstants, CacheConstants, and TileLinkSizeConstants
|
2014-04-10 12:35:43 -07:00 |
|