riscv/rocket-chip
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fixes sbt error during first run

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Scott Beamer
2014-09-02 14:33:58 -07:00
parent e384b33cc3
commit bfb662968d
1 changed files with 1 additions and 1 deletions
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uncore/chisel-dependent.sbt
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@@ -1,6 +1,6 @@
// Provide a managed dependency on chisel if -DchiselVersion="" is
// supplied on the command line.
val chiselVersion = System.getProperty("chiselVersion", "None")
lazy val chiselVersion = System.getProperty("chiselVersion", "None")
libraryDependencies ++= ( if (chiselVersion != "None" ) ("edu.berkeley.cs" %% "chisel" % chiselVersion) :: Nil; else Nil)