riscv/rocket-chip: Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip) - rocket-chip - Tiband Gitea

riscv/rocket-chip

T

Andrew Waterman 364a6de214 Use Mem instead of Vec[Reg]

2014-05-18 19:26:35 -07:00

Use Mem instead of Vec[Reg]

2014-05-18 19:26:35 -07:00

Languages

Scala 93.1%

C++ 2.1%

Python 2%

Makefile 1.2%

Verilog 0.8%

Other 0.7%